Model-based design space exploration for RTES with SysML and MARTE

Proceedings - 2008 Forum on Specification, Verification and Design Languages, FDL'08

Volumn , Issue , 2008, Pages 203-208

  Mura, Marcello ^a   Murillo, Luis Gabriel ^a   Prevostini, Mauro ^a  

^a UNIVERSITY OF LUGANO   (Switzerland)

Author keywords

[No Author keywords available]

Indexed keywords

ARCHITECTURAL SPECIFICATIONS; DESIGN FLOWS; DESIGN POINTS; DESIGN SPACE EXPLORATION; HETEROGENEOUS HARDWARE; MODEL-BASED DESIGN; OPTIMAL SOLUTIONS; REAL-TIME EMBEDDED SYSTEMS; SCHEDULING ANALYSIS; SYSTEM DESIGN; TIMING CONSTRAINTS;

EMBEDDED SOFTWARE; EMBEDDED SYSTEMS; LINGUISTICS; REAL TIME SYSTEMS; SPACE RESEARCH; SPECIFICATIONS; SYSTEMS ANALYSIS; TIMING CIRCUITS;

DESIGN;

EID: 67650508273     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FDL.2008.4641446     Document Type: Conference Paper

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