A generic analytical model of switching characteristics for efficiency-oriented design and optimization of cmos integrated buck converters

Proceedings of the IEEE International Conference on Industrial Technology

Volumn , Issue , 2009, Pages

  Modak, Rohit ^a   Baghini, Maryam Shojaei ^a  

^a INDIAN INSTITUTE OF TECHNOLOGY BOMBAY   (India)

Author keywords

[No Author keywords available]

Indexed keywords

ANALYTICAL MODEL; BUCK CONVERTERS; CMOS BUCK CONVERTERS; DESIGN AND OPTIMIZATION; EFFICIENT DESIGNS; INPUT VOLTAGE RANGES; INPUT VOLTAGES; INTERNAL CAPACITANCE; LOAD CONDITION; LOAD CURRENTS; MAXIMUM EFFICIENCY; ON CHIPS; POWER MANAGEMENTS; PROCESS PARAMETERS; SIMULATION RESULT; SPECTRE SIMULATIONS; STORED CHARGE; SWITCHING CHARACTERISTICS; SWITCHING TIME; SYNCHRONOUS BUCK CONVERTER; SYSTEM ON CHIPS;

DESIGN; ELECTRIC POTENTIAL; ENERGY MANAGEMENT; MATLAB; SPACE RESEARCH;

SIMULATORS;

EID: 67650302007     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICIT.2009.4939579     Document Type: Conference Paper

References (11)

1. R. W. Erickson and D. Maksimović, Fundamentals Of Power Electronics. Springer, 2nd ed., 2001.
2. A. Stratakos, S. Sanders, and R. Brodersen, "A low-voltage CMOS DC-DC converter for a portable battery-operated system," IEEE Power Electronics Specialists Conference, pp. 619-626 vol.1, Jun 1994.
3. S. Reynolds, "A DC-DC converter for short-channel CMOS technologies," IEEE Journal of Solid-State Circuits, vol. 32, pp. 111-113, Jan 1997.
4. V. Kursun, S. G. Narendra, V. K. De and E. G. Friedman, "Efficiency Analysis of a High Frequency Buck Converter for On-Chip Integration with a Dual-VDD Microprocessor," Proc. of European Solid-State Circuits Conference, pp. 743-746, September 2002.
5. B. Arbetter, R. Erickson, and D. Maksimovic, "DC-DC converter design for battery-operated systems," IEEE Power Electronics Specialists Conference, vol. 1, pp. 103-109, Jun 1995.
6. Z. Zhang, W. Eberle, Z. Yang, Y.-F. Liu, and P. Sen, "Optimal Design of Resonant Gate Driver for Buck Converter Based on a New Analytical Loss Model," IEEE Trans. on Power Electronics, vol. 23, pp. 653-666, March 2008.
7. University of California Berkeley, "BSIM Homepage." http://wwwdevice. eecs.berkeley.edu/̃bsim3/.
8. G. Villar, E. Alarcon, F. Guinjoan, and A. Poveda, "Efficiency- oriented switching frequency tuning for a buck switching power converter," IEEE International Symposium on Circuits and Systems, ISCAS, vol. 3, pp. 2473-2476, May 2005.
9. J. Klein, Synchromous Buck MOSFET Loss Calculations with Excel Model. Fairchild Semiconductor, April 2006.
10. Y. Katayama, M. Edo, T. Denta, T. Kawashima, and T. Ninomiya, "Optimum design method of CMOS IC for DC-DC converter that integrates power stage MOSFETs," IEEE Power Electronics Specialists Conference, vol. 6, pp. 4486-4491, June 2004.
11. W. Eberle, Z. Zhang, Y.-F. Liu, and P. Sen, "A simple switching loss model for buck voltage regulators with current source drive," Power Electronics Specialists Conference, 2008. PESC 2008. IEEE, pp. 3780-3786, June 2008.