A low-power safety mode for variation tolerant systems-on-chip

Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems

Volumn , Issue , 2008, Pages 33-41

  Wolpert, David ^a   Ampadu, Paul ^a  

^a UNIVERSITY OF ROCHESTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

AREA OVERHEAD; AVERAGE FREQUENCY; AVERAGE POWER; AVERAGE SYSTEM; DYNAMIC VOLTAGE AND FREQUENCY SCALING; FOUR-CORE; LOOK UP TABLE; LOW POWER; MULTI CORE; ON-CHIP SENSORS; PVT VARIATIONS; ROOM TEMPERATURE; RUNTIME; SYSTEMS ON CHIPS;

FAULT TOLERANCE; MICROPROCESSOR CHIPS; PROBABILITY DENSITY FUNCTION; PROGRAMMABLE LOGIC CONTROLLERS; QUALITY ASSURANCE; TABLE LOOKUP;

FAULT TOLERANT COMPUTER SYSTEMS;

EID: 67649998736     PISSN: 15505774     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DFT.2008.17     Document Type: Conference Paper

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