A 60-GHz CMOS power amplifier with marchand balun-based parallel power combiner

Proceedings of 2008 IEEE Asian Solid-State Circuits Conference, A-SSCC 2008

Volumn , Issue , 2008, Pages 121-124

  Yoshihara, Y ^a   Fujimoto, R ^a   Ono, N ^a   Mitomo, T ^a   Hoshino, H ^a   Hamada, M ^a  

^a TOSHIBA CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

1DB COMPRESSION POINT; 90NM CMOS; CMOS POWER AMPLIFIERS; LOW COUPLING; MARCHAND BALUN; ON CHIPS; PARALLEL POWER; PHASE DIFFERENCE; POWER COMBINER; POWER EFFICIENCY; POWER GAINS; SATURATED OUTPUT POWER; SCALED CMOS;

POWER AMPLIFIERS;

EID: 67649921329     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASSCC.2008.4708744     Document Type: Conference Paper

References (7)

1. T. Mitomo et al, "A 60-GHz CMOS Receiver Front-End With Frequency Synthesizer," IEEE J. Solid-State Circuits, Vol. 43, No. 4, pp. 1030-1037, Apr. 2008.
2. M. Tanomura et al, "TX and RX Front-Ends for 60GHz Band in 90nm Standard Bulk CMOS," ISSCC Dig. Tech. Papers, pp. 558-559, Feb. 2008.
3. B. Afshar et al, "A Robust 24mW 60GHz Receiver in 90nm Standard CMOS," ISSCC Dig. Tech. Papers, pp. 182-183, Feb. 2008.
4. S. Pinel et al, "A 90nm CMOS 60GHz Radio," ISSCC Dig. Tech. Papers, pp. 130-131, Feb. 2008.
5. A. Parsa and B. Razavi, "A 60GHz CMOS Receiver Using a 30GHz LO," ISSCC Dig. Tech. Papers, pp. 190-191, Feb. 2008.
6. I. Aoki et al, "Fully integrated CMOS power amplifier design using the distributed active-transformer architecture," IEEE J. Solid-State Circuits, Vol. 37, No. 3, pp. 371-383, Mar. 2002.
7. K. S. Ang and I. D. Robertson, "Analysis and Design of Impedance-Transforming Planar Marchand Baluns," IEEE Trans. Microwave Theory and Techniques, Vol. 49, No. 2, pp. 402-406, Feb. 2001.