A design for passive RFID system on a chip

International Conference on Advanced Communication Technology, ICACT

Volumn 1, Issue , 2009, Pages 836-839

  Park, Chan Won ^a   Choi, Gil Young ^a   Chae, Jong Suk ^a   Kim, Bo Gwan ^b  

^a Electronics and Telecommunications Research Institute (ETRI)   (South Korea)

^b Chungnam National University   (South Korea)

Author keywords

Chip; Reader; RFID; UHF

Indexed keywords

CHIP; DIE AREA; DIGITAL BASEBAND; DIRECT-CONVERSION ARCHITECTURE; FREQUENCY RANGES; INTERFACE BLOCKS; LOW-POWER CONSUMPTION; OUTPUT POWER; PASSIVE RFID; PROCESSOR CORES; READER; RFID; RFID APPLICATIONS; RFID PROTOCOLS; SYSTEM ON A CHIP; UHF; UHF BAND;

COMPUTER ARCHITECTURE; FLASH MEMORY; USER INTERFACES;

ARCHITECTURAL DESIGN;

EID: 67649869820     PISSN: 17389445     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)

1. Global RFID Market Analysis till 2010," RNCOS, Dec, 2007
2. K. Finkenzeller, RFID Handbook, Second Edition, John Wiley, Chichester, 2003.
3. Al Alien Technologys, "RFID Tag Strap for EPC Class-1 Gen-2 Data sheet", May, 2007
4. David M. Pozar, "Microwave and RF Design of Wireless System", WILEY, pp 120-124
5. International Organization for Standardization. Information technology -Radio frequency identification for item management. Part 6: Parameters for air interface communications at 860 MHz to 960 MHz: ISO/IEC FCD 18000-6REV1, ISO/IEC JTCl/SC31, June, 2008.