Variation-tolerant hierarchical voltage monitoring circuit for soft error detection

Proceedings of the 10th International Symposium on Quality Electronic Design, ISQED 2009

Volumn , Issue , 2009, Pages 799-805

  Narsale, Ashay ^a   Huang, Michael C ^a  

^a University of Rochester   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CHECK POINTING; CRITICAL CHARGE; DETECTION MECHANISM; ENERGY CONSUMPTION; EXTERNAL NOISE; FEATURE SIZES; GENERAL-PURPOSE SYSTEMS; LOGIC ERRORS; MODULAR REDUNDANCY; NANO-METER REGIMES; NICHE MARKETS; NOISE MARGINS; POWER OVERHEAD; PROTECTION TECHNIQUES; SCALE DOWN; SOFT ERROR; SOFT ERROR DETECTION; SUPPLY RAIL; VOLTAGE MONITORING;

DESIGN; EMBEDDED SYSTEMS; ERROR CORRECTION; MICROPROCESSOR CHIPS; QUALITY ASSURANCE; REDUNDANCY;

ERROR DETECTION;

EID: 67649640003     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISQED.2009.4810395     Document Type: Conference Paper

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