CMOS pixel sensor development: A fast read-out architecture with integrated zero suppression

Journal of Instrumentation

Volumn 4, Issue 4, 2009, Pages

  Hu Guo, Ch ^a   Baudot, J ^a   Bertolone, G ^a   Besson, A ^a   Brogna, A S ^a   Colledani, C ^a   Claus, G ^a   De Masi, R ^a   Degerli, Y ^b   Dorokhov, A ^a   Doziere, G ^a   Dulinski, W ^a   Fang, X ^a   Gelin, M ^b   Goffe, M ^a   Guilloux, F ^b   Himmi, A ^a   Jaaskelainen, K ^a   Koziel, M ^a   Morel, F ^a   Orsini, F ^b   Specht, M ^a   Sun, Q ^a   Valin, I ^a   Winter, M ^a   more..

^a UNIVERSITÉ DE STRASBOURG   (France)

^b CEA SACLAY   (France)

Author keywords

Front end electronics for detector readout; Particle tracking detectors; Pixelated detectors and associated VLSI electronics; VLSI circuits

Indexed keywords

CORRELATED DOUBLE SAMPLING; DESIGN ARCHITECTURE; DETECTOR READOUT; EXPERIMENTAL APPARATUS; FIXED PATTERN NOISE; MONOLITHIC ACTIVE PIXEL SENSORS; PARTICLE TRACKING; VLSI ELECTRONICS;

DISCRIMINATORS; OPTICAL PROJECTORS; PIXELS; VLSI CIRCUITS;

SENSORS;

EID: 67649183778     PISSN: 17480221     EISSN: 17480221     Source Type: Journal    
DOI: 10.1088/1748-0221/4/04/P04012     Document Type: Article

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