A compact distance cell for analog classifiers

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn , Issue , 2005, Pages 3627-3630

  Aras, Sualp ^a   Aksin, Devrim Yilmaz ^b  

^a TEXAS A AND M UNIVERSITY   (United States)

^b The University of Texas at Dallas   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

AREA DENSITY; AREA EFFICIENCY; CMOS INVERTERS; CMOS PROCESS; CURRENT TRANSFER; DYNAMIC TEMPLATES; MOS TRANSISTORS; SILICON AREA; SINGLE-ENDED; TWO-DIMENSIONAL ARRAYS;

CLASSIFIERS; LEARNING SYSTEMS; TRANSISTOR TRANSISTOR LOGIC CIRCUITS;

CELLS;

EID: 67649112366     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2005.1465415     Document Type: Conference Paper

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