Safely stimulating the clock synchronization algorithm in Time-triggered systems-A combined formal and experimental approach

IEEE Transactions on Industrial Informatics

Volumn 5, Issue 2, 2009, Pages 132-146

  Fugger, Matthias ^a   Armengaud, Eric ^a   Steininger, Andreas ^a,b  

^a VIENNA UNIVERSITY OF TECHNOLOGY   (Austria)

^b Kompetenzzentrum Das Virtuelle Fahrzeug Forschungsgesellschaft mbH   (Austria)

Author keywords

Automotive electronics; Clock synchronization; FlexRay; Formal verification; Time triggered communication; TTP C

Indexed keywords

AUTOMOTIVE ELECTRONICS; CLOCK SYNCHRONIZATION; FLEXRAY; FORMAL VERIFICATION; TIME-TRIGGERED COMMUNICATION; TTP/C;

AUTOMOBILE ELECTRONIC EQUIPMENT; MECHANICAL CLOCKS;

SYNCHRONIZATION;

EID: 67349161508     PISSN: 15513203     EISSN: None     Source Type: Journal    
DOI: 10.1109/TII.2009.2017526     Document Type: Article

References (20)

1. H. Thane and H. Hansson, "Using deterministic replay for debugging of distributed real-time systems," in Proc. 12th Euromicro Conf. Real- Time Syst., Jun. 2000, pp. 265-272.
2. N. Navet, Y.-Q. Song, Simonot-Lion F. and C. Wilwert, "Trends in automotive communication systems," Proc. IEEE, vol. 93, pp. 1204-1223, 2005.
3. E. Armengaud, "A transparent online test approach for time-triggered communication protocols," Ph.D. dissertation, Technische Universitat Wien, Institut fur Technische Informatik, Treitlstr, Vienna, Austria, 2008.
4. E. Armengaud and A. Steininger, "Remote measurement of local oscillator drifts in FlexRay networks," in Proc. Design, Automation & Test in Europe (DATE'09), Apr. 2009.
5. E. Armengaud, "Experimental evaluation of the FlexRay clock synchronization service," in Proc. 20. ITG/GI/GMM Workshop, Testmeth- oden und Zuverldssigkeit von Schaltungen und Systemen, Feb. 2008, pp. 85-90.
6. E. Armengaud, F. Rothensteiner, A. Steininger, R. Pallierer, M. Ho- rauer, and M. Zauner, "A structured approach for the systematic test of embedded automotive communication systems," in Proc. IEEE Int. Test Conf. (ITC'05), Nov. 2005, pp. 1-8. (Pubitemid 46287488)
7. Time-triggered protocol ttp/c high level specification document pro- tocol,1.1 ed. TTTech, 2003.
8. FlexRay Communications Systems - Protocol Specification, FlexRay Consortium, 2005. [ Online]. Available: http://www.flexray.com, 2.1
9. E. Anceaume and I. Puaut, Performance evaluation of clock synchronization algorithms, Tech. Rep. RR-3526, 1998.
10. K. Arvind, "Probabilistic clock synchronization in distributed systems," IEEE Trans. ParallelDistrib. Syst., vol. 5, pp. 474-487, 1994.
11. F. Schmuck and F. Cristian, "Continuous clock amortization need not affect the precision of a clock synchronization algorithm," in Proc. 9th ACM Symp. Principles of Distrib. Comput., New York, 1990, pp. 133-143.
12. H. Kopetz, Real-Time Systems: Design Principles for Distributed Embedded Applications. Norwell, MA: Kluwer, 1997.
13. H. Kopetz and W. Ochsenreiter, "Clock synchronization in distributed real-time systems," IEEE Trans. Comput., vol. 36, pp. 933-940, 1987. (Pubitemid 17632017)
14. J. Lundelius-Welch and N. Lynch, "A new fault-tolerant algorithm for clocksynchronization," Inf. Comput., vol. 77, no. 1, pp. 1-36, 1988.
15. E. Armengaud, A. Steininger, and M. Horauer, "A method for bit level test and diagnosis of communication services," in Proc. 8th IEEE Workshop on Design Diagnostics ofElectronic Circuits Systems (DDECS'005), Hungary, Apr. 2005, pp. 69-74.
16. F. B. Schneider, Understanding protocols for byzantine clock synchronization, Dept. Computer Science, Upson Hall, Ithaca, NY, Tech. Rep. TR 87-859, 1987.
17. N. Shankar, "Mechanical verification of a generalized protocol for Byzantine fault tolerant clock synchronization," in Proc. 2nd Int. Symp. Formal Techniques in Real-Time and Fault-Tolerant Systems, London, U.K., 1991, pp. 217-236.
18. H. Pfeifer, D. Schwier, and F. von Henke, "Formal verification for time-triggered clock synchronization," in Dependable Computing for Critical Applications, Jan. 1999, pp. 207-226.
19. K. Schossmaier, "Interval-based Clock state and rate synchronization," Ph.D. dissertation, Technische Universitat Wien, Faculty of Technical and Natural Sciences, Dept. Automation, Treitlstr, Vienna, Austria, 1998.
20. E. Armengaud, M. Fuegger, and A. Steininger, "Safe deterministic replay for stimulating the clock synchronization algorithm in time-triggered systems," in Proc. 7th IEEE Int. Workshop on Factory Commun. Syst. (WFCS'08), May 2008, pp. 277-286.