-
1
-
-
35048848006
-
-
Akkar, M.-L., Bevan, R., Goubin, L.: Two Power Analysis Attacks against One- Mask Methods. In: Roy, B., Meier, W. (eds.) FSE 2004. LNCS, 3017, pp. 332-347. Springer, Heidelberg (2004)
-
Akkar, M.-L., Bevan, R., Goubin, L.: Two Power Analysis Attacks against One- Mask Methods. In: Roy, B., Meier, W. (eds.) FSE 2004. LNCS, vol. 3017, pp. 332-347. Springer, Heidelberg (2004)
-
-
-
-
2
-
-
84943615552
-
-
Akkar, M.-L., Giraud, C.: An Implementation of DES and AES, Secure against Some Attacks. In: Koc, C.K., Naccache, D., Paar, C. (eds.) CHES 2001. LNCS, 2162, pp. 309-318. Springer, Heidelberg (2001)
-
Akkar, M.-L., Giraud, C.: An Implementation of DES and AES, Secure against Some Attacks. In: Koc, C.K., Naccache, D., Paar, C. (eds.) CHES 2001. LNCS, vol. 2162, pp. 309-318. Springer, Heidelberg (2001)
-
-
-
-
4
-
-
35048848490
-
-
Blomer, J., Guajardo, J., Krummel, V.: Provably Secure Masking of AES. In: Hand- schuh, H., Hasan, M.A. (eds.) SAC 2004. LNCS, 3357, pp. 69-83. Springer, Heidelberg (2004)
-
Blomer, J., Guajardo, J., Krummel, V.: Provably Secure Masking of AES. In: Hand- schuh, H., Hasan, M.A. (eds.) SAC 2004. LNCS, vol. 3357, pp. 69-83. Springer, Heidelberg (2004)
-
-
-
-
5
-
-
27244440344
-
-
Canright, D.: A Very Compact S-Box for AES. In: Rao, J.R., Sunar, B. (eds.) CHES 2005. LNCS, 3659, pp. 441-455. Springer, Heidelberg (2005)
-
Canright, D.: A Very Compact S-Box for AES. In: Rao, J.R., Sunar, B. (eds.) CHES 2005. LNCS, vol. 3659, pp. 441-455. Springer, Heidelberg (2005)
-
-
-
-
6
-
-
38549094404
-
Nessie proposal: NOEKEON
-
Daemen, J., Peeters, M., Assche, G.V., Rijmen, V.: Nessie proposal: NOEKEON. Submitted as an NESSIE Candidate Algorithm (2000), http://www. cryptonessie.org
-
(2000)
Submitted as an NESSIE Candidate Algorithm
-
-
Daemen, J.1
Peeters, M.2
Assche, G.V.3
Rijmen, V.4
-
7
-
-
32644441738
-
AES proposal: Rijndael. Submitted as an AES Candidate Algorithm
-
Daemen, J., Rijmen, V.: AES proposal: Rijndael. Submitted as an AES Candidate Algorithm. Submitted as an AES Candidate Algorithm (2000), http://www.nist.gov/aes
-
(2000)
Submitted as an AES Candidate Algorithm
-
-
Daemen, J.1
Rijmen, V.2
-
8
-
-
27244432772
-
-
Fischer, W., Gammel, B.M.: Masking at Gate Level in the Presence of Glitches. In: Rao, J.R., Sunar, B. (eds.) CHES 2005. LNCS, 3659, pp. 187-200. Springer, Heidelberg (2005)
-
Fischer, W., Gammel, B.M.: Masking at Gate Level in the Presence of Glitches. In: Rao, J.R., Sunar, B. (eds.) CHES 2005. LNCS, vol. 3659, pp. 187-200. Springer, Heidelberg (2005)
-
-
-
-
9
-
-
35248830819
-
-
Golic, J.D., Tymen, C.: Multiplicative Masking and Power Analysis of AES. In: Kaliski Jr., B.S., Koc, C.K., Paar, C. (eds.) CHES 2002. LNCS, 2523, pp. 198-212. Springer, Heidelberg (2003)
-
Golic, J.D., Tymen, C.: Multiplicative Masking and Power Analysis of AES. In: Kaliski Jr., B.S., Koc, C.K., Paar, C. (eds.) CHES 2002. LNCS, vol. 2523, pp. 198-212. Springer, Heidelberg (2003)
-
-
-
-
10
-
-
35248830337
-
Private Circuits: Securing Hardware against Probing Attacks
-
Boneh, D, ed, CRYPTO 2003, Springer, Heidelberg
-
Ishai, Y., Sahai, A., Wagner, D.: Private Circuits: Securing Hardware against Probing Attacks. In: Boneh, D. (ed.) CRYPTO 2003. LNCS, vol. 2729, pp. 463-481. Springer, Heidelberg (2003)
-
(2003)
LNCS
, vol.2729
, pp. 463-481
-
-
Ishai, Y.1
Sahai, A.2
Wagner, D.3
-
11
-
-
42149129401
-
-
Electronics and Telecommunications Research Institute (ETRI) in Daejeon, South Korea
-
Kim, C., Schlaffer, M., Moon, S.: Differential Side Channel Analysis Attacks on FPGA Implementations of ARIA. Electronics and Telecommunications Research Institute (ETRI) in Daejeon, South Korea 30(2), 315-325 (2008)
-
(2008)
Differential Side Channel Analysis Attacks on FPGA Implementations of ARIA
, vol.30
, Issue.2
, pp. 315-325
-
-
Kim, C.1
Schlaffer, M.2
Moon, S.3
-
12
-
-
67049168702
-
-
Kirschbaum, M., Popp, T.: Evaluation of Power Estimation Methods Based on Logic Simulations. In: Posch, K.C., Wolkerstorfer, J. (eds.) Proceedings of Aus- trochip 2007, October 11, 2007, Graz, Austria, pp. 45-51. Verlag der Technischen Universitat Graz (October 2007) ISBN 978-3-902465-87-0
-
Kirschbaum, M., Popp, T.: Evaluation of Power Estimation Methods Based on Logic Simulations. In: Posch, K.C., Wolkerstorfer, J. (eds.) Proceedings of Aus- trochip 2007, October 11, 2007, Graz, Austria, pp. 45-51. Verlag der Technischen Universitat Graz (October 2007) ISBN 978-3-902465-87-0
-
-
-
-
13
-
-
84939573910
-
Differential Power Analysis
-
Wiener, M, ed, CRYPTO 1999, Springer, Heidelberg
-
Kocher, P.C., Jaffe, J., Jun, B.: Differential Power Analysis. In: Wiener, M. (ed.) CRYPTO 1999. LNCS, vol. 1666, pp. 388-397. Springer, Heidelberg (1999)
-
(1999)
LNCS
, vol.1666
, pp. 388-397
-
-
Kocher, P.C.1
Jaffe, J.2
Jun, B.3
-
14
-
-
35048829391
-
-
Kwon, D., Kim, J., Park, S., Sung, S.H., Sohn, Y., Song, J.H., Yeom, Y., Yoon, E.-J., Lee, S., Lee, J., Chee, S., Han, D., Hong, J.: New Block Cipher: ARIA. In: Lim, J.-I., Lee, D.-H. (eds.) ICISC 2003. LNCS, 2971, pp. 432-445. Springer, Heidelberg (2004)
-
Kwon, D., Kim, J., Park, S., Sung, S.H., Sohn, Y., Song, J.H., Yeom, Y., Yoon, E.-J., Lee, S., Lee, J., Chee, S., Han, D., Hong, J.: New Block Cipher: ARIA. In: Lim, J.-I., Lee, D.-H. (eds.) ICISC 2003. LNCS, vol. 2971, pp. 432-445. Springer, Heidelberg (2004)
-
-
-
-
15
-
-
24144459808
-
-
Mangard, S., Popp, T., Gammel, B.M.: Side-Channel Leakage of Masked CMOS Gates. In: Menezes, A. (ed.) CT-RSA 2005. LNCS, 3376, pp. 351-365. Springer, Heidelberg (2005)
-
Mangard, S., Popp, T., Gammel, B.M.: Side-Channel Leakage of Masked CMOS Gates. In: Menezes, A. (ed.) CT-RSA 2005. LNCS, vol. 3376, pp. 351-365. Springer, Heidelberg (2005)
-
-
-
-
16
-
-
27244451021
-
-
Mangard, S., Pramstaller, N., Oswald, E.: Successfully Attacking Masked AES Hardware Implementations. In: Rao, J.R., Sunar, B. (eds.) CHES 2005. LNCS, 3659, pp. 157-171. Springer, Heidelberg (2005)
-
Mangard, S., Pramstaller, N., Oswald, E.: Successfully Attacking Masked AES Hardware Implementations. In: Rao, J.R., Sunar, B. (eds.) CHES 2005. LNCS, vol. 3659, pp. 157-171. Springer, Heidelberg (2005)
-
-
-
-
17
-
-
33750700765
-
-
Mangard, S., Schramm, K.: Pinpointing the Side-Channel Leakage of Masked AES Hardware Implementations. In: Goubin, L., Matsui, M. (eds.) CHES 2006. LNCS, 4249, pp. 76-90. Springer, Heidelberg (2006)
-
Mangard, S., Schramm, K.: Pinpointing the Side-Channel Leakage of Masked AES Hardware Implementations. In: Goubin, L., Matsui, M. (eds.) CHES 2006. LNCS, vol. 4249, pp. 76-90. Springer, Heidelberg (2006)
-
-
-
-
18
-
-
84974679353
-
-
Messerges, T.S.: Securing the AES Finalists Against Power Analysis Attacks. In: Schneier, B. (ed.) FSE 2000. LNCS, 1978, pp. 150-164. Springer, Heidelberg (2001)
-
Messerges, T.S.: Securing the AES Finalists Against Power Analysis Attacks. In: Schneier, B. (ed.) FSE 2000. LNCS, vol. 1978, pp. 150-164. Springer, Heidelberg (2001)
-
-
-
-
19
-
-
85010668170
-
Threshold Implementations Against Side- Channel Attacks and Glitches
-
Ning, P, Qing, S, Li, N, eds, ICICS 2006, Springer, Heidelberg
-
Nikova, S., Rechberger, C., Rijmen, V.: Threshold Implementations Against Side- Channel Attacks and Glitches. In: Ning, P., Qing, S., Li, N. (eds.) ICICS 2006. LNCS, vol. 4307, pp. 529-545. Springer, Heidelberg (2006)
-
(2006)
LNCS
, vol.4307
, pp. 529-545
-
-
Nikova, S.1
Rechberger, C.2
Rijmen, V.3
-
20
-
-
26444465110
-
-
Oswald, E., Mangard, S., Pramstaller, N., Rijmen, V.: A Side-Channel Analysis Resistant Description of the AES S-Box. In: Gilbert, H., Handschuh, H. (eds.) FSE 2005. LNCS, 3557, pp. 413-423. Springer, Heidelberg (2005)
-
Oswald, E., Mangard, S., Pramstaller, N., Rijmen, V.: A Side-Channel Analysis Resistant Description of the AES S-Box. In: Gilbert, H., Handschuh, H. (eds.) FSE 2005. LNCS, vol. 3557, pp. 413-423. Springer, Heidelberg (2005)
-
-
-
-
21
-
-
27244451515
-
-
Popp, T., Mangard, S.: Masked Dual-Rail Pre-charge Logic: DPA-Resistance Without Routing Constraints. In: Rao, J.R., Sunar, B. (eds.) CHES 2005. LNCS, 3659, pp. 172-186. Springer, Heidelberg (2005)
-
Popp, T., Mangard, S.: Masked Dual-Rail Pre-charge Logic: DPA-Resistance Without Routing Constraints. In: Rao, J.R., Sunar, B. (eds.) CHES 2005. LNCS, vol. 3659, pp. 172-186. Springer, Heidelberg (2005)
-
-
-
-
23
-
-
50249140648
-
-
Rivain, M., Dottax, E., Prouff, E.: Block Ciphers Implementations Provably Secure Against Second Order Side Channel Analysis. In: Nyberg, K. (ed.) FSE 2008. LNCS, 5086, pp. 127-143. Springer, Heidelberg (2008)
-
Rivain, M., Dottax, E., Prouff, E.: Block Ciphers Implementations Provably Secure Against Second Order Side Channel Analysis. In: Nyberg, K. (ed.) FSE 2008. LNCS, vol. 5086, pp. 127-143. Springer, Heidelberg (2008)
-
-
-
-
24
-
-
33745652931
-
-
Schramm, K., Paar, C.: Higher Order Masking of the AES. In: Pointcheval, D. (ed.) CT-RSA 2006. LNCS, 3860, pp. 208-225. Springer, Heidelberg (2006)
-
Schramm, K., Paar, C.: Higher Order Masking of the AES. In: Pointcheval, D. (ed.) CT-RSA 2006. LNCS, vol. 3860, pp. 208-225. Springer, Heidelberg (2006)
-
-
-
-
25
-
-
27244445509
-
-
Suzuki, D., Saeki, M., Ichikawa, T.: DPA Leakage Models for CMOS Logic Circuits. In: Rao, J.R., Sunar, B. (eds.) CHES 2005. LNCS, 3659, pp. 366-382. Springer, Heidelberg (2005)
-
Suzuki, D., Saeki, M., Ichikawa, T.: DPA Leakage Models for CMOS Logic Circuits. In: Rao, J.R., Sunar, B. (eds.) CHES 2005. LNCS, vol. 3659, pp. 366-382. Springer, Heidelberg (2005)
-
-
-
-
26
-
-
35248825993
-
-
Tiri, K., Verbauwhede, I.: Securing Encryption Algorithms against DPA at the Logic Level: Next Generation Smart Card Technology. In: Walter, C.D., Koc, C.K., Paar, C. (eds.) CHES 2003. LNCS, 2779, pp. 125-136. Springer, Heidelberg (2003)
-
Tiri, K., Verbauwhede, I.: Securing Encryption Algorithms against DPA at the Logic Level: Next Generation Smart Card Technology. In: Walter, C.D., Koc, C.K., Paar, C. (eds.) CHES 2003. LNCS, vol. 2779, pp. 125-136. Springer, Heidelberg (2003)
-
-
-
-
27
-
-
3042604811
-
A Logic Level Design Methodology for a Secure DPA Resistant ASIC or FPGA Implementation. In: DATE
-
Los Alamitos
-
Tiri, K., Verbauwhede, I.: A Logic Level Design Methodology for a Secure DPA Resistant ASIC or FPGA Implementation. In: DATE, pp. 246-251. IEEE Computer Society Press, Los Alamitos (2004)
-
(2004)
IEEE Computer Society Press
, pp. 246-251
-
-
Tiri, K.1
Verbauwhede, I.2
-
28
-
-
24144458916
-
-
Trichina, E., Korkishko, T., Lee, K.-H.: Small Size, Low Power, Side Channel- Immune AES Coprocessor: Design and Synthesis Results. In: Dobbertin, H., Ri- jmen, V., Sowa, A. (eds.) AES 2005. LNCS, 3373, pp. 113-127. Springer, Heidelberg (2005)
-
Trichina, E., Korkishko, T., Lee, K.-H.: Small Size, Low Power, Side Channel- Immune AES Coprocessor: Design and Synthesis Results. In: Dobbertin, H., Ri- jmen, V., Sowa, A. (eds.) AES 2005. LNCS, vol. 3373, pp. 113-127. Springer, Heidelberg (2005)
-
-
-
-
29
-
-
35248890508
-
-
Trichina, E., De Seta, D., Germani, L.: Simplified Adaptive Multiplicative Masking for AES. In: Kaliski Jr., B.S., Koc, C.K., Paar, C. (eds.) CHES 2002. LNCS, 2523, pp. 187-197. Springer, Heidelberg (2003)
-
Trichina, E., De Seta, D., Germani, L.: Simplified Adaptive Multiplicative Masking for AES. In: Kaliski Jr., B.S., Koc, C.K., Paar, C. (eds.) CHES 2002. LNCS, vol. 2523, pp. 187-197. Springer, Heidelberg (2003)
-
-
-
-
30
-
-
35048870686
-
-
Waddle, J., Wagner, D.: Towards efficient second-order power analysis. In: Joye, M., Quisquater, J.-J. (eds.) CHES 2004. LNCS, 3156, pp. 1-15. Springer, Heidelberg (2004)
-
Waddle, J., Wagner, D.: Towards efficient second-order power analysis. In: Joye, M., Quisquater, J.-J. (eds.) CHES 2004. LNCS, vol. 3156, pp. 1-15. Springer, Heidelberg (2004)
-
-
-
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