A fully integrated 660 MHz low-swing energy-recycling DC-DC converter

IEEE Transactions on Power Electronics

Volumn 24, Issue 6, 2009, Pages 1475-1485

  Alimadadi, Mehdi ^a   Sheikhaei, Samad ^a   Lemieux, Guy ^a   Mirabbasi, Shahriar ^a   Dunford, William G ^a,b   Palmer, Patrick R ^c  

^a UNIVERSITY OF BRITISH COLUMBIA   (Canada)

^b Legend Power Systems Inc   (Canada)

^c UNIVERSITY OF CAMBRIDGE   (United Kingdom)

Author keywords

Charge recycling; Integrated output filter; Lowpower stacked driver; Subgigahertz switching, switch mode DC DC converter

Indexed keywords

CHARGE RECYCLING; DC-DC BUCK CONVERTER; DESIGN AND SIMULATION; DRIVE CHAINS; FILTER COMPONENTS; FULLY INTEGRATED; GATING SIGNALS; INTEGRATED OUTPUT FILTER; LOW SWING; LOWPOWER STACKED DRIVER; METAL OXIDE SEMICONDUCTOR; ON CHIPS; PROTOTYPE CIRCUITS; SUBGIGAHERTZ SWITCHING, SWITCH MODE DC-DC CONVERTER; SWITCHING LOSS; ZERO-VOLTAGE-SWITCHING OPERATIONS;

AUTOMOBILE DRIVERS; CHARGE TRANSFER; CONTROL SYSTEM STABILITY; DC-DC CONVERTERS; HVDC POWER TRANSMISSION; ION EXCHANGE; RECYCLING;

ZERO VOLTAGE SWITCHING;

EID: 66749174541     PISSN: 08858993     EISSN: None     Source Type: Journal    
DOI: 10.1109/TPEL.2009.2013624     Document Type: Article

References (21)

1. J. M. Rabaey, A. Chandrakasan, and B. Nikolic, Digital Integrated Circuits, 2nd ed. Upper Saddle River, NJ: Pearson Education International, 2003.
2. N. Dragone, A. Aggarwal, and L. R. Carley, "An adaptive on-chip voltage regulation technique for low-power applications," in Proc. IEEE Int. Symp. Low Power Electron. Design (ISLPED), 2000, pp. 20-24.
3. A. J. Stratakos, S. R. Sanders, and R. W. Brodersen, "Alow-voltage CMOS DC-DC converter for a portable battery-operated system," in Proc. IEEE Power Electron. Spec. Conf. (PESC), 1994, pp. 619-626.
4. M. Alimadadi, S. Sheikhaei, G. Lemieux, S. Mirabbasi, and P. Palmer, "A 3GHz Switching DC-DC converter using clock-tree charge-recycling in 90 nm CMOS with integrated output filter," in Proc. IEEE Int. Solid-State Circuits Conf. (ISSCC), Feb. 2007, pp. 532-533.
5. M. Alimadadi, S. Sheikhaei, G. Lemieux, S. Mirabbasi, P. Palmer, and W. Dunford, "Energy recovery from high-frequency clocks using DC-DC converters," in Proc. IEEE Int. Symp. Very Large Scale Integr. (ISVLSI), 2008, pp. 162-167.
6. M.Alimadadi, "Recycling clock network energy in high-performance digital designs using on-chip DC-DC converters," Ph.D. dissertation, Dept. Electr. Comput. Eng., Univ. British Columbia, Vancouver, BC, Canada, 2008.
7. M. Alimadadi, S. Sheikhaei, G. Lemieux, S. Mirabbasi, P. Palmer, and W. Dunford, "A 660MHzZVSDC-DCconverter using gate-driver charge-recycling in 0.18μm CMOS with an integrated output filter," in Proc. IEEE Power Electron. Spec. Conf. (PESC), 2008, pp. 140-146.
8. G. Lemieux, M. Alimadadi, S. Sheikhaei, S. Mirabbasi, and P. Palmer, "SoC Energy savings = reduce + reuse + recycle: A case study using a 660 MHz DC-DC converter with integrated output filter," in Proc. IEEE Can. Conf. Electr. Comput. Eng. (CCECE), 2008, pp. 947-950.
9. Y. Qiu, M. Xu, J. Sun, and F. C. Lee, "A generic high-frequency model for the nonlinearities in buck converters," IEEE Trans. Power Electron., vol. 22, no. 5, pp. 1970-1977, Sep. 2007.
10. G. Spiazzi, P. Mattavelli, and L. Rossetto, "Effects of parasitic components in high-frequency resonant drivers for synchronous rectification MOSFETs," IEEE Trans. Power Electron., vol. 23, no. 4, pp. 2082-2092, Jul. 2008.
11. S. Abedinpour, B. Bakkaloglu, and S. Kiaei, "A multistage interleaved synchronous buck converter with integrated output filter in 0.18 μm SiGe process," IEEE Trans. Power Electron., vol. 22, no. 6, pp. 2164-2175, Nov. 2007.
12. J. Xiao, A. Peterchev, J. Zhang, and S. Sanders, "A 4 μA-quiescent-current dual-mode buck converter IC for cellular phone applications," in Proc. IEEE Int. Solid-State Circuits Conf. (ISSCC) 2004, pp. 280-283.
13. S. Rajapandian, K. L. Shepard, P. Haucha, and T. Karnik, "High-voltage power delivery through charge recycling," IEEE J. Solid-State Circuits, vol. 41, no. 6, pp. 1400-1410, Jun. 2006.
14. N. Mohan, T. M. Undeland, and W. P. Robins, Power Electronics Converters Application and Design, 2nd ed. New York: Wiley, 1995.
15. A. M. Niknejad and R. G. Meyer, "Analysis, design, and optimization of spiral inductors and transformers for Si RF IC's," IEEE J. Solid-State Circuits, vol. 33, no. 10, pp. 1470-1481, Oct. 1998.
16. C. Yue and S. Wong, "On-chip spiral inductors with patterned ground shields for Si-based RF ICs," IEEE J. Solid-State Circuits, vol. 33, no. 5, pp. 743-752, May 1998.
17. J. N. Burghartz, "Progress in RF inductors on silicon-understanding substrate losses," in Proc. IEEE Int. Electron Devices Meeting (IEDM), 1998, pp. 523-526.
18. J. N. Burghartz, D. C. Edelstein, M. Soyuer, H. A. Ainspan, and K. A. Jenkins, "RF circuit design aspects of spiral inductors on silicon," IEEE J. Solid-State Circuits, vol. 33, no. 12, pp. 2028-2034, Dec. 1998.
19. W. Shen, F. Wang, D. Boroyevich, and C. W. Tipton, "Loss characterization and calculation of nanocrystalline cores for high-frequency magnetics applications," IEEE Trans. Power Electron. vol. 23, no. 1, pp. 475-484, Jan. 2008.
20. T. Y. Man, P. K. T. Mok, and M. Chan, "A CMOS-control rectifier for discontinuous-conduction mode switching DC-DC converters," in Proc. IEEE Int. Solid-State Circuits Conf. (ISSCC), 2006, pp. 358-359.
21. J. Y. Park and M. P. Flynn, "A low jitter multi-phase PLL with capacitive coupling," in Proc. IEEE Custom Integr. Circuits Conf. (CICC), 2006, pp. 753-756.