Fast and robust face detection on a parallel optimized architecture implemented on FPGA

IEEE Transactions on Circuits and Systems for Video Technology

Volumn 19, Issue 4, 2009, Pages 597-602

  Farrugia, Nicolas ^a   Mamalet, Franck ^a   Roux, Sébastien ^a   Yang, Fan ^b   Paindavoine, Michel ^b  

^a ORANGE LABS   (France)

^b UNIVERSITÉ DE BOURGOGNE   (France)

Author keywords

Embedded; Face detection; FPGA; High level synthesis; Parallel architecture; Realtime

Indexed keywords

EMBEDDED; FACE DETECTION; FPGA; HIGH LEVEL SYNTHESIS; REALTIME;

CONVOLUTION; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); PARALLEL ARCHITECTURES;

FACE RECOGNITION;

EID: 66349095455     PISSN: 10518215     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCSVT.2009.2014013     Document Type: Article

References (27)

1. M.-H. Yang, D. J. Kriegman, and N. Ahuja, "Detecting faces in image A survey," IEEE Trans. Pattern Anal. Mach. Intell., vol. 24, no. 1, pp. 3458, Jan. 2002.
2. H. A. Rowley, S. Baluja, and T. Kanade, "Neural network-based face detection," IEEE Trans. Pattern Anal. Mach. Intell., vol. 26, no. 1, pp. 23-38, Jan. 1998.
3. T. Theocharides, G. Link, N. Vijaykrishnan, M. J. Irwin, and W. Wolf, "Embedded hardware face detection," in Proc. 17th Int. Conf. on VLSI Design (VLSID 04), Mumbai, India, 2004, pp. 133-138.
4. P. Viola and M. Jones, "Robust real-time object detection," in Proc. 2nd Int. Workshop Statistical Comput. Theories Vision-Modeling, Learning, Comput. Sampling (SCTV'01), Vancouver, BC, Canada, 2001.
5. Y. Wei, X. Bing, and C. Chareonsak, "FPGA implementation of adaboost algorithm for detection of face biometrics," in Proc. IEEE Int. Workshop on Biomedical Circuits and Systems, Dec. 1-3, 2004, pp. S1/6-17-20.
6. T. Theocharides, N. Vijaykrishnan, and M. J. Irwin, "A parallel architecture for hardware face detection," in Proc. IEEE Computer Soc. Annu. Symp. VLSI (ISVLSI'06), Karlsruhe, Germany, 2006.
7. S. Paschalakis and M. Bober, "A low cost FPGA system for high speed face detection and tracking,"in Proc. IEEE Int. Conf. FieldProgrammable Technology (FPT'03), Tokyo, Japan, 2003.
8. D. Nguyen, D. Halupka, P. Aarabi, and A. Sheikholeslami, "Real-time face detection and lip feature extraction using field-programmable gate arrays," IEEE Trans. Syst. Man. Cybern., B. Cybern., vol. 36, no. 4, pp. 902-912, Aug. 2006.
9. R. McCready, "Real-time face detection on a configurable hardware system," in Proc. 10th Int. Workshop Field-Programmable Logic Appl, 2000, London, U.K., pp. 157-162.
10. V. Kianzad, S. Saha, J. Schlessman, G. Aggarwal, S. S. Bhattacharyya, W. Wolf, and R. Chellappa, "An architectural level design methodology for embedded face detection," in Proc 3rd Int. Conf. Hardware Software Codesign Syst. Synthesis, Jersey City, New Jersey, USA, 2005.
11. C. Garcia and M. Delakis, "Convolutional face finder: A neural architecture for fast and robust face detection," IEEE Trans. Pattern Anal Mach. Intell., vol. 26, no. 11, pp. 1408-1423, Nov. 2004.
12. S. M. Akramullah, I. Ahmad, and M. L. Liou, "Performance of softwarebased MPEG-2 video encoder on parallel and distributed systems," IEEE Trans Circuits Sys. Video Technol., vol. 7, no. 4, pp. 687-695, Aug. 1997.
13. I. Ahmad, Y. He, and M. L. Liou, "Video compression with parallel processing," Parallel Computing, vol. 28, no. 7, pp. 1039-1078, Aug. 2002.
14. M. Raulet, F. Urban, J.-F. Nezan, C. Moy, O. Déforges, and Y. Sorel, "Rapid prototyping for heterogeneous multicomponent systems: An MPEG-4 stream over a UMTS communication link," JASP, 2005.
15. Open SystemC Initiative (OSCI), [Online], Available: http://www.systemc. org
16. V. Kathail, S. Aditya, R. Schreiber, B. Ramakrishna Rau, D. Cronquist, and M. Sivaraman, "Pico: Automatically designing custom, computers," Computer, vol. 35, no. 9, pp. 39-47, Sep. 2002.
17. S. McCloud, "Using a catapult c-based flow to speed implementation and increase flexibility," Mentor Graphics, Tech. Rep.
18. "Dk design suite datasheet," Agility Design System Inc., [Online]. http://agilityds.com/l.iterature/dk-datasheet-0.1000-hq-screen.pdf
19. I. Auge, F. Pétrot, F. Donnet, and P. Donnet, "Platform-based design for parallel c specifications." IEEE Trans. Computer-Aided Design Integr. Circuits Syst., vol. 24, no. 12, pp. 1811-1826, Dec. 2005.
20. P. Coussy, G. Corre, E. Senn, P. Bomel, and E. Martin, "High-level synthesis under i/o timing and memory constraints," in Proc. ISCAS, Kobe, Japan, 2005, pp. 680-683.
21. Y. LeCun and Y Bengio, "Convolutional networks for images, speech, and time-series," 1995. [Online], Available: http://citeseer.ist.psu.edu/ lecun95convolutional.html
22. S. Roux, F. Mamalet, and C. Garcia, "Embedded convolutional face finder," in Proc. IEEE Int. Conf. Multimedia Expo (ICME'06), Toronto, Canada, 2006.
23. N. Farrugia, F. Mamalet, S. Roux, F. Yang, and M. Paindavoine, "A face detection system implemented on FPGA," in Proc. Int. Symp. Circuits Syst. (ISCAS'07), New Orleans, 2007.
24. N. Farrugia, F. Mamalet, S. Roux, F. Yang, and M. Paindavoine, in Proc. 1st Workshop Design Arch. Signal Image Process. (DASIP'07), Grenoble, France, 2007.
25. Y. Hori, K. Shimizu, Y Nakamura, and T. Kuroda, "A real-time multi face detection technique using positive-negative lines of face technique," in Pmc. 17th Int. Conf. Pattern Recognition (ICPR "04), Cambridge, U.K., 2004.
26. C. Garcia and S. Duffher, "A connexionist approach for robust and precise facial feature detection in complex scenes," in Proc. IEEE Int. Symp. Image Signal Process. Anal., Zagreb, Croatia, 2005, pp. 316-321.
27. S. Duffner and C. Garcia, "Robust face alignement using convolutional neural networks," in Proc. Int. Conf. Computer Vision Theory and Appl. (VISAPP), Funchal Madeira, Portugal, 2008, pp. 30-37.