A fully integrated 0.13-μm CMOS 40-Gb/s serial link transceiver

IEEE Journal of Solid-State Circuits

Volumn 44, Issue 5, 2009, Pages 1510-1521

  Kim, Jeong Kyoum ^a   Kim, Jaeha ^b,c   Kim, Gyudong ^d   Jeong, Deog Kyoon ^a  

^a Seoul National University   (South Korea)

^b RAMBUS INC   (United States)

^c Stanford University   (United States)

^d Silicon Image Inc   (United States)

Author keywords

CDR; CMOS; Equalizer; High speed; Inductive peaking; Phase detector; PLL; Quadrature VCO; Receiver; Sampler; Serial link; Transceiver; Transmitter

Indexed keywords

CDR; CMOS; HIGH SPEED; INDUCTIVE PEAKING; PHASE DETECTOR; PLL; QUADRATURE VCO; RECEIVER; SAMPLER; SERIAL LINK;

ANTENNA PHASED ARRAYS; CLOCKS; CMOS INTEGRATED CIRCUITS; ELECTRIC CABLES; ELECTRIC CHARGE; JITTER; MICROSTRIP DEVICES; PHASE LOCKED LOOPS; SIGNAL DETECTION; TELECOMMUNICATION CABLES; TRANSMITTERS; VARIABLE FREQUENCY OSCILLATORS;

TRANSCEIVERS;

EID: 66149131876     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2009.2017973     Document Type: Conference Paper

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