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Volumn 26, Issue 2, 2009, Pages 14-19
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Case study of a 65-nm SoC design
a
a
MEDIATEK INC
(Taiwan)
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Author keywords
Chip development; Design collaboration; Design flow; Design methodology; MediaTek; Moore's law; PLM
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Indexed keywords
CHIP DEVELOPMENT;
DESIGN COLLABORATION;
DESIGN FLOW;
DESIGN METHODOLOGY;
MEDIATEK;
MOORE'S LAW;
PLM;
DESIGN;
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EID: 66149117854
PISSN: 07407475
EISSN: None
Source Type: Journal
DOI: 10.1109/MDT.2009.28 Document Type: Article |
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Times cited : (6)
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References (0)
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