A minimal source-synchronous interface

Proceedings of the Annual IEEE International ASIC Conference and Exhibit

Volumn 2002-January, Issue , 2002, Pages 443-447

  Chakraborty, Ajanta ^a   Greenstreet, Mark R ^a  

^a UNIVERSITY OF BRITISH COLUMBIA   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

CLOCKS;

CLOCK INPUT; CLOCK PERIOD; SOURCE SYNCHRONOUS; SOURCE SYNCHRONOUS INTERFACES;

APPLICATION SPECIFIC INTEGRATED CIRCUITS;

EID: 64749108910     PISSN: 10630988     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASIC.2002.1158100     Document Type: Conference Paper

References (6)

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3. W. J. Dally and J. W. Poulton. Digital Systems Engineering. Cambridge University Press, 1998.
4. A. L. Fisher and H. Rung. Synchronizing large VLSI processor arrays. IEEE Transactions on Computers. C-34(8):734-740. Aug. 1985.
5. M. R. Oreenstreet. STAR I: A Technique for High-Bandwidth Communication. PhD thesis, Department of Computer Science. Princeton University, Jan. 1993
6. I. Sutherland and S. Fairbanks, GasP: A minimal FIFO control. In Proceedings of the Seventh International Symposium on Advanced Research in Asynchronous Circuits and Svslems, pages 46-53, Apr. 2001.