Modeling and characterization of intermodulation linearity on a 90-nm RF CMOS technology

IEEE Transactions on Microwave Theory and Techniques

Volumn 57, Issue 4, 2009, Pages 965-971

  Wei, Xiaoyun ^a   Niu, Guofu ^a   Li, Ying ^a   Yang, Ming Ta ^b   Taylor, Stewart S ^c  

^a AUBURN UNIVERSITY   (United States)

^b TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY   (Taiwan)

^c INTEL CORPORATION   (United States)

Author keywords

BSIM4; Drain induced barrier lowering (DIBL); Linearity; Low noise amplifier (LNA); RF CMOS; Threshold voltage; Volterra series

Indexed keywords

BSIM4; DRAIN INDUCED BARRIER LOWERING (DIBL); LINEARITY; LOW-NOISE AMPLIFIER (LNA); RF CMOS; VOLTERRA SERIES;

AUDIO FREQUENCY AMPLIFIERS; CMOS INTEGRATED CIRCUITS; DIELECTRIC RELAXATION; HETEROJUNCTION BIPOLAR TRANSISTORS; INTERMODULATION; LINEARIZATION; LOW NOISE AMPLIFIERS; MOSFET DEVICES; THRESHOLD VOLTAGE; TRANSISTOR TRANSISTOR LOGIC CIRCUITS;

CAPACITANCE;

EID: 64749106877     PISSN: 00189480     EISSN: None     Source Type: Journal    
DOI: 10.1109/TMTT.2009.2014448     Document Type: Conference Paper

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