PWM inverter output filter cost-to-losses tradeoff and optimal design

IEEE Transactions on Industry Applications

Volumn 45, Issue 2, 2009, Pages 887-897

  Pasterczyk, Robert J ^a   Guichon, Jean Michel ^b   Schanen, Jean Luc ^b   Atienza, Eric ^c  

^a Schneider Electric   (France)

^b CNRS   (France)

^c Design Processing Technologies SA   (France)

Author keywords

Circuit modeling; Circuit optimization; Design automation; Power electronics; Uninterruptible power systems

Indexed keywords

CAPACITOR LOSS; CIRCUIT BEHAVIORS; CIRCUIT MODELING; CIRCUIT OPTIMIZATION; CONTROL LAWS; DESIGN AUTOMATION; DESIGN MODELS; DESIGN PROCESS; INDUCTOR DESIGNS; INPUT PARAMETERS; OPTIMAL DESIGNS; OUTPUT FILTERS; OUTPUT WAVEFORMS; PHYSICAL LIMITATIONS; POWER LEVELS; PULSE-WIDTH-MODULATION; PWM INVERTERS; TOTAL HARMONIC DISTORTIONS; TRADE-OFF CURVES; UNINTERRUPTIBLE POWER SUPPLIES;

CAPACITANCE; CAPACITORS; COMMUNICATION CHANNELS (INFORMATION THEORY); COMPUTER AIDED DESIGN; CONTROL THEORY; COSTS; CURVE FITTING; ELECTRIC POWER TRANSMISSION NETWORKS; MAGNETIC CIRCUITS; MODELS; POWER ELECTRONICS; POWER TRANSMISSION; UNINTERRUPTIBLE POWER SYSTEMS;

OPTIMIZATION;

EID: 64049090427     PISSN: 00939994     EISSN: None     Source Type: Journal    
DOI: 10.1109/TIA.2009.2013605     Document Type: Article

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