Simulation of mechanical stresses during shallow trench isolation process

European Solid-State Device Research Conference

Volumn , Issue , 1998, Pages 120-123

  Poncet, Alain ^a,c   Bolt, Mike ^b,c   Barla, Kathy ^c   De Wolf, Ingrid ^d  

^a ORANGE LABS   (France)

^b PHILIPS RESEARCH LABORATORIES   (Germany)

^c STMICROELECTRONICS   (Italy)

^d IMEC   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

LEAKAGE CURRENTS; SEMICONDUCTING SILICON;

ACTIVE AREA; DIODE LEAKAGE; MECHANICAL STRESS; MICRO-RAMAN; OXIDIZING PROCESS; SHALLOW TRENCH ISOLATION; SHALLOW-TRENCH-ISOLATION PROCESS;

STRESSES;

EID: 6344252724     PISSN: 19308876     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)

1. P. Smeys et aI, IEDM96 proc., pp. 709-712.
2. I. De Wolf, Topical Review. Semicond. Sci. Techno\. 11, pp. 139-154, 1996.
3. A. Poncet SISDEP'93 proc. pp. 173-176