SAP-A program package for three-dimensional interconnect simulation

Proceedings of the IEEE 1998 International Interconnect Technology Conference, IITC 1998

Volumn 1998-June, Issue , 1998, Pages 250-252

  Sabelka, R ^a   Selberherr, S ^a  

^a INSTITUTE FOR MICROELECTRONICS   (Austria)

Author keywords

[No Author keywords available]

Indexed keywords

SOFTWARE PACKAGES;

APPLICATION EXAMPLES; CAPACITANCE EXTRACTION; COUPLED ELECTRO-THERMAL SIMULATIONS; INTERCONNECT STRUCTURES; PROGRAM PACKAGES; RESISTANCE CALCULATION; SIMULATION PROGRAM; THREE-DIMENSIONAL ANALYSIS;

PROGRAM PROCESSORS;

EID: 6344225818     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IITC.1998.704913     Document Type: Conference Paper

References (9)

1. R. Bauer and S. Selberherr. Capacitance calculation of VLSI multilevel wiring structures. In Int. Workshop on VLSI Process and Device Modeling, pages 142-143, Nara, Japan, 1993.
2. M. T. Bohr. Interconnect scaling-The real limiter t o high performance ULSI. In Proc. IEDM, pages 241-242, 1995.
3. P. Fleischmann, R. Sabelka, A. Stach, R. Strasser, and S. Selberherr. Grid generation for three dimensional process and device simulation. In International Conference on Simulation of Semiconductor Processes and Devices, pages 161-166, Tokyo, Japan, 1996. Business Center for Academic Societies Japan.
4. R. Martins and S. Selberherr. Layout data in TCAD frameworks. In Modelling and Simulation, pages 1122-1126. Society for Computer Simulation International, 1996.
5. M. Mukai, T. Tatsumi, N. Nakauchi, T. Kobayashi, K. Koyama, Y. Komatsu, R. Bauer, G. Rieger, and S. Selberherr. The simulation system for three-dimensional capacitance and current density calculation with a user friendly gui. Technical Report of IEICE, 95(223):63-68, 1995.
6. R. Sabelka, K. Koyama, and S. Selberherr. STAP-A finite element simulator for three-dimensional thermal analysis of interconnect structures. In Simulation in Industry-9th European Simulation Symposium, pages 621-625, Passau, Germany, Oct. 1997.
7. W. Schroeder, K. Martin, B. Lorensen, L. S. Avila, R. Avila, and C. C. Law. The Visualization Toolkit, An Object-Oriented Approach to 30 Graphics. Prentice Hall PTR/New Jersey, 1996.
8. J. R. Shewchuk. Triangle: Engineering a 2D quality mesh generator and Delaunay triangulator. In First Workshop on Applied Computational Geometry, pages 124-133. Association for Computing Machinery, May 1996.
9. A. Stach, R. Sabelka, and S. Selberherr. Three-dimensional layout-based thermal and capacitive simulation of interconnect structures. In PTOC. 16th IASTED Int. Conf. on Modelling, Identification and Control, pages 16-19, Innsbruck, Austria, 1997.