An optimization algorithm for capacitor voltage balance of N-level diode clamped inverters

IECON Proceedings (Industrial Electronics Conference)

Volumn , Issue , 2008, Pages 3201-3206

  Verne, Santiago A ^a   González, Sergio A ^a   Valla, María I ^a  

^a UNIVERSIDAD NACIONAL DE LA PLATA   (Argentina)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; CAPACITORS; ELECTRIC INVERTERS; INDUSTRIAL ELECTRONICS; POWER CONVERTERS;

ARBITRARY NUMBERS; CAPACITOR VOLTAGE BALANCES; CAPACITOR VOLTAGES; DC-LINK CAPACITORS; DIODE CLAMPED INVERTERS; DIODE-CLAMPED MULTILEVEL INVERTERS; LINE VOLTAGES; OPERATION MODES; OPTIMIZATION ALGORITHMS; SWITCHING CYCLES; VOLTAGE BALANCES; VOLTAGE DEVIATIONS; VOLTAGE SOURCES;

CAPACITANCE;

EID: 63149179852     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IECON.2008.4758473     Document Type: Conference Paper

References (4)

1. Nabae, I. Takahashi, and H. Akagi, "A new neutral-point-clamped PWM inverter," IEEE Trans. Ind. Appl., vol. IA-17, no. 5, pp. 518-523, Sep./Oct. 1981.
2. J. S. Lai, F. Z. Peng, "Multilevel Converters-a New Breed of Power Converters", IEEE Trans. On Industry Applications, Vol. 32, No. 3, pp. 509-517, 1996.
3. Y. Chen, B. Mwinyiwiwa, Z. Wolanski, B. Ooi, "Regulating and equalizing DC capacitive voltages in multilevel STATCOM", IEEE Trans. on Power Delivery, Vol. 12, No. 2, pp. 901-907, 1997.
4. Zighuo Pan, F. Z. Peng, K. Corzine, V. Stefanovic, J. M. Leuthen, S. Gataric, "Voltage Balancing Control of Diode-Clamped