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Volumn , Issue , 2008, Pages

Evaluating FPGAs for floating-point performance

Author keywords

[No Author keywords available]

Indexed keywords

DESIGN POINTS; EMBEDDED PROCESSING; FIELD-PROGRAMMABLE GATE ARRAYS; FLOATING-POINT CALCULATIONS; OPTIMAL DESIGNS; PEAK PERFORMANCE; WORD LENGTHS;

EID: 62949245114     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/HPRCTA.2008.4745680     Document Type: Conference Paper
Times cited : (6)

References (14)
  • 1
    • 84869257066 scopus 로고    scopus 로고
    • FPGA Floating Point Performance, a pencil and paper evaluation, January 2007
    • "FPGA Floating Point Performance - a pencil and paper evaluation", Dave Strenski, HPCwire, January 2007. http://www.hpcwire.com/ hpc/1195762.html
    • Dave Strenski, HPCwire
  • 2
    • 62949114531 scopus 로고    scopus 로고
    • Designing and Using FPGAs for Double-Precision Floating Point Math
    • Altera whitepaper, August
    • "Designing and Using FPGAs for Double-Precision Floating Point Math", Altera whitepaper, August 2007. http://www.altera.com/literature/wp/ wp-01028.pdf
    • (2007)
  • 3
    • 62949240224 scopus 로고    scopus 로고
    • Virtex-5 Family Overview
    • Xilinx document, DS100 (v4.0) March 31
    • "Virtex-5 Family Overview", Xilinx document, DS100 (v4.0) March 31, 2008. http://www.xilinx.com/support/documentation/data-sheets/ds 100.pdf
    • (2008)
  • 4
    • 84869259130 scopus 로고    scopus 로고
    • The Ultimate System Integration Platform
    • Xilinx Virtex-5 update
    • "The Ultimate System Integration Platform", Xilinx Virtex-5 update, http://www.xilinx.com/publications/prod-mktg/pn0010938- 4.pdf
  • 5
    • 35448984859 scopus 로고    scopus 로고
    • Xilinx Logicore Floating-Point Operator v3.0
    • Xilinx document, DS335 September 28
    • "Xilinx Logicore Floating-Point Operator v3.0", Xilinx document, DS335 September 28, 2006. http://www.xilinx.com/bvdocs/ipcenter/data- sheet/floating-point-ds335.pdf
    • (2006)
  • 6
    • 84869256492 scopus 로고    scopus 로고
    • DRC Reconfigurable Processor Unit - RPU110 Family
    • datasheet, DRC Computer, November
    • "DRC Reconfigurable Processor Unit - RPU110 Family", datasheet, DRC Computer, November 2007. http://drccomputer.com/pdfs/DRC-RPU110-fall07.pdf
    • (2007)
  • 7
    • 62949142298 scopus 로고    scopus 로고
    • Computational Bottlenecks and Hardware Decisions for FPGAs, Dave Strenski, FPGA and Structured ASIC Journal, November 2006, http://www.fpgajournal.com/articles-2006/pdf/20061114-cra y.pdf
    • "Computational Bottlenecks and Hardware Decisions for FPGAs", Dave Strenski, FPGA and Structured ASIC Journal, November 2006, http://www.fpgajournal.com/articles-2006/pdf/20061114-cra y.pdf
  • 8
    • 62949135989 scopus 로고    scopus 로고
    • Product Brief: Quad-Core AMD Opteron™ Processor, AMD, 2008, http://www.amd.com/usen/ Processors/ProductInformation/0.30-118-8796- 15223,00.html
    • "Product Brief: Quad-Core AMD Opteron™ Processor", AMD, 2008, http://www.amd.com/usen/ Processors/ProductInformation/0.30-118-8796- 15223,00.html
  • 10
    • 62949183502 scopus 로고    scopus 로고
    • When FPGAs are better at floating-point than microprocessors, Florent de Dinechin, Jeremie Detrey, Octavian Cret, Radu Tudoran, International Symposium on Field Programmable Gate Arrays, 2008, http://jeremie.detrey.free. fr/publications/DinDetCre-fpga-20 08-pre.pdf
    • "When FPGAs are better at floating-point than microprocessors", Florent de Dinechin, Jeremie Detrey, Octavian Cret, Radu Tudoran, International Symposium on Field Programmable Gate Arrays, 2008, http://jeremie.detrey.free. fr/publications/DinDetCre-fpga-20 08-pre.pdf
  • 11
    • 62949102190 scopus 로고    scopus 로고
    • Evaluation of Running FFTs on the Cray XD1 with Attached FPGAs, Dave Strenski, Michael Babst, Roderick Swift, Cray User Group (CUG) meeting 2005. http://www.dsplogic.com/pdfs/CUG2005-FFT.pdf
    • "Evaluation of Running FFTs on the Cray XD1 with Attached FPGAs", Dave Strenski, Michael Babst, Roderick Swift, Cray User Group (CUG) meeting 2005. http://www.dsplogic.com/pdfs/CUG2005-FFT.pdf
  • 12
    • 0142137310 scopus 로고    scopus 로고
    • Least-squares fit of genomic data by sums of epistatic effects, Philip Hanlon, William Andrew Lorenz, Dave Strenski, Journal of Parallel and Distributed Computing, July 2003.
    • "Least-squares fit of genomic data by sums of epistatic effects", Philip Hanlon, William Andrew Lorenz, Dave Strenski, Journal of Parallel and Distributed Computing, July 2003.
  • 13
    • 36348993090 scopus 로고    scopus 로고
    • Twenty-Six Moves Suffice for Rubik's Cube, Daniel Kunkle, Gene Cooperman, Proc. of International Symposium on Symbolic and Algebraic Computation (ISSAC '07), ACM Press, 2007, 235--242. http://www.ccs.neu.edu/home/ kunkle/docs/rubiks26.pdf
    • "Twenty-Six Moves Suffice for Rubik's Cube", Daniel Kunkle, Gene Cooperman, Proc. of International Symposium on Symbolic and Algebraic Computation (ISSAC '07), ACM Press, 2007, 235--242. http://www.ccs.neu.edu/home/ kunkle/docs/rubiks26.pdf
  • 14
    • 84869251287 scopus 로고    scopus 로고
    • Performance Evaluation of FPGA-Based Biological Applications, July 2007
    • "Performance Evaluation of FPGA-Based Biological Applications", Olaf Storaasli, Weikuan Yu, Dave Strenski, Jim Maltby, July 2007. http://ft.ornl.gov/-olaf/pubs/CUG07Olaf17M07.pdf
    • Olaf Storaasli, Weikuan Yu, Dave Strenski, Jim Maltby


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.