Architecture implementation of an improved decimal CORDIC method

26th IEEE International Conference on Computer Design 2008, ICCD

Volumn , Issue , 2008, Pages 95-100

  Sanchez, Jose Luis ^a   Mora, Higinio ^a   Mora, Jeronimo ^a   Jimeno, Antonio ^a  

^a UNIVERSITY OF ALICANTE   (Spain)

Author keywords

[No Author keywords available]

Indexed keywords

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

CORDIC METHODS; DECIMAL ARITHMETICS; FPGA IMPLEMENTATIONS; NO CONVERSIONS; NUMBER OF ITERATIONS;

MULTICARRIER MODULATION;

EID: 62349119969     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCD.2008.4751846     Document Type: Conference Paper

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