A hybrid FPGA/coarse parallel processing architecture for multi-modal visual feature descriptors

Proceedings - 2008 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2008

Volumn , Issue , 2008, Pages 241-246

  Jensen, Lars Baunegaard With ^a   Kjær Nielsen, Anders ^a   Alonso, Javier Díaz ^b   Ros, Eduardo ^b   Krüger, Norbert ^a  

^a UNIVERSITY OF SOUTHERN DENMARK   (Denmark)

^b Dept Arquitectura y Tecnología de Computadores   (Spain)

Author keywords

[No Author keywords available]

Indexed keywords

HYBRID ARCHITECTURES; MULTI CORES; MULTI MODALS; PARALLEL PROCESSING ARCHITECTURES; PROCESSING SPEED; SPARSE IMAGES; VISUAL FEATURES; VISUAL-PROCESSING;

IMAGE PROCESSING; VISUAL COMMUNICATION;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 62349095605     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ReConFig.2008.23     Document Type: Conference Paper

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