A 32 mW 1.25 GS/s 6b 2b/step SAR ADC in 0.13 μm CMOS

IEEE Journal of Solid-State Circuits

Volumn 44, Issue 3, 2009, Pages 862-873

  Cao, Zhiheng ^a   Yan, Shouli ^b   Li, Yunchu ^c  

^a QUALCOMM INC   (United States)

^b The University of Texas at Austin   (United States)

^c ANALOG DEVICES INC   (United States)

Author keywords

Analog to digital conversion; CMOS analog integrated circuits; Low power electronics; Switched capacitor circuits

Indexed keywords

ANALOG CIRCUITS; ANALOG TO DIGITAL CONVERSION; CAPACITANCE; CAPACITORS; DIGITAL INTEGRATED CIRCUITS; ERROR CORRECTION; INTEGRATED CIRCUITS; LINEAR INTEGRATED CIRCUITS; MULTICARRIER MODULATION; POWER ELECTRONICS; SYNTHETIC APERTURES; TIME VARYING SYSTEMS;

CMOS ANALOG INTEGRATED CIRCUITS; DIGITAL CMOS; INTERNAL CLOCKS; LOW-POWER ELECTRONICS; POST-PROCESSING; REFERENCE BUFFERS; SAR ADC; SWITCHED-CAPACITOR CIRCUITS; TIME-INTERLEAVING;

CMOS INTEGRATED CIRCUITS;

EID: 61449212247     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2008.2012329     Document Type: Article

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