Integration of design for manufacturability (DFM) practices in design flows

Proceedings - International Symposium on Quality Electronic Design, ISQED

Volumn , Issue , 2005, Pages 102-106

  Riviere Cazaux, Lionel ^a   Lucas, Kevin ^a   Fitch, Jon ^a  

^a FREESCALE SEMICONDUCTOR INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ADVANCED CMOS; COMMUNICATION STANDARDS; DESIGN FLOWS; DESIGN FOR MANUFACTURABILITY; LAYOUT OPTIMIZATION; ROADMAP;

CMOS INTEGRATED CIRCUITS;

MACHINE DESIGN;

EID: 60649111132     PISSN: 19483287     EISSN: 19483295     Source Type: Conference Proceeding    
DOI: 10.1109/ISQED.2005.66     Document Type: Conference Paper

References (1)

1. Heliot, J.-P.; Parmentier, F and Baron, M.-P.; "LYS: a solutionfor system on chip production cost and time to volume reduction" in Fourth International Symposium on Quality Electronic Design, 2003. Proceedings, pp. 85-89