Heterogeneous two-level logic and its density and fault tolerance implications in nanoscale fabrics

IEEE Transactions on Nanotechnology

Volumn 8, Issue 1, 2009, Pages 22-30

  Wang, Teng ^a   Narayanan, Pritish ^a   Andras Moritz, Csaba ^a  

^a UNIVERSITY OF MASSACHUSETTS   (United States)

Author keywords

Hybrid semiconductor nanowire molecular (CMOL); Nanoelectronics; Nanofabrics; Nanoscale Application Specific IC (NASIC); Nanoscale processors; Semiconductor nanowires (NWs)

Indexed keywords

APPLICATIONS; DEFECT DENSITY; ELECTRIC CONDUCTIVITY; ELECTRIC WIRE; ERRORS; FABRICS; NANOELECTRONICS; NANOSTRUCTURED MATERIALS; NANOTECHNOLOGY; NANOWIRES; QUALITY ASSURANCE; RELIABILITY; SEMICONDUCTOR MATERIALS;

HYBRID SEMICONDUCTOR/NANOWIRE/MOLECULAR (CMOL); NANOFABRICS; NANOSCALE APPLICATION-SPECIFIC IC (NASIC); NANOSCALE PROCESSORS; SEMICONDUCTOR NANOWIRES (NWS);

FAULT TOLERANCE;

EID: 59049091578     PISSN: 1536125X     EISSN: None     Source Type: Journal    
DOI: 10.1109/TNANO.2008.2007645     Document Type: Article

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