Guest editorial special issue on nanowire transistors: Modeling, device design, and technology

IEEE Transactions on Nanotechnology

Volumn 7, Issue 6, 2008, Pages 643-650

  Kumar, M Jagadesh ^a   Reed, Mark A ^b   Amaratunga, Gehan A J ^c   Cohen, Guy M ^d   Janes, David B ^e   Lieber, Charles M ^f   Meyyappan, M ^g   Wernersson, Lars Erik ^h   Wang, Kang L ⁱ   Chau, Robert S ^j   Kamins, Theodore I ^k   Lundstrom, Mark ^l   Yu, Bin ^g   Zhou, Chongwu ^l  

^a INDIAN INSTITUTE OF TECHNOLOGY DELHI   (India)

^b YALE UNIVERSITY   (United States)

^c UNIVERSITY OF CAMBRIDGE   (United Kingdom)

^d IBM T J WATSON RESEARCH CENTER   (United States)

^e PURDUE UNIVERSITY   (United States)

^f HARVARD UNIVERSITY   (United States)

^g NASA AMES RESEARCH CENTER   (United States)

^h LUND UNIVERSITY   (Sweden)

ⁱ UNIVERSITY OF CALIFORNIA   (United States)

^j INTEL CORPORATION   (United States)

^k HEWLETT PACKARD LABORATORIES   (United Kingdom)

^l UNIVERSITY OF SOUTHERN CALIFORNIA   (United States)

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Author keywords

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Indexed keywords

EID: 58149248073     PISSN: 1536125X     EISSN: None     Source Type: Journal    
DOI: 10.1109/TNANO.2008.2010023     Document Type: Editorial

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