Behavioural modelling and simulation of ΣΔ modulators using hardware description languages

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 2003, Pages 168-173

  Castro Lopez R ^a   Ferandez F V ^a,b   Medeiro, F ^a,b   Rodriguez Vazquez A ^a,b  

^a Centro Informatico Cientifico de Andalucia   (Spain)

^b UNIVERSIDAD DE SEVILLA   (Spain)

Author keywords

[No Author keywords available]

Indexed keywords

BEHAVIOURAL MODELLING; BEHAVIOURAL SIMULATIONS; BUILDING BLOCKES; CIRCUIT NON-IDEALITIES; ELECTRICAL SIMULATION; FOURTH-ORDER; MULTI-BITS;

COMPUTER HARDWARE DESCRIPTION LANGUAGES; EXHIBITIONS;

HARDWARE;

EID: 58149125876     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2003.1253604     Document Type: Conference Paper

References (11)

1. J. Candy and G.C. Temes, ?Oversampling Methods for A/D and D/A Conversion,? in Oversampling converters, pp. 1-25, IEEE Press, 1992.
2. F. Medeiro, B. Pérez-Verdú and A. Rodríguez- Vázquez, Top-Down Design of High-Performance Sigma-Delta Modulators. Kluwer Academic Publishers, Boston, 1999.
3. V. F. Dias, V. Liberali and F. Maloberti: ?Design Tools for Oversampling Data Converters: Needs and Solutions?, Microelectronics Journal, Vol. 23, pp. 641-650, 1992.
4. C. H. Wolff and L. Carley: ?Simulation of Modulators Using Behavioural Models?, Proc. IEEE Int. Symp. Circuits and Systems, pp. 376-379, 1990.
5. V. Liberali, V.F. Dias, M. Ciapponi and F. Maloberti, ?TOSCA: A Simulator for Switched-capacitor Noise-shaping A/D Converters,? IEEE Trans. Computer-Aided Design, Vol. 12, No. 9, pp. 1376-1386, Sept. 1993.
6. A. Opal: ?Sampled Data Simulation of Linear and Nonlinear Circuits?, IEEE Trans. on Computer-Aided Design, Vol. 15, pp. 295-306, March 1996.
7. F. Medeiro, B. Pérez-Verdú, A. Rodríguez- Vázquez and J.L. Huertas ?A Vertically Integrated Tool for Automated Design of Modulators? IEEE J.Solid-State Circuits, pp. 762-777, July 1995.
8. K. Francken, P. Vancorenland and G. Gielen, ?DAISY: A Simulation-based High-level Synthesis Tool for Modulators,? Proc. IEEE/ACM Int. Conf. Computer-Aided Design, pp. 188-192, 2000.
9. IEEE VHDL Language Reference Manual, IEEE Std 1076-2002.
10. IEEE VHDL 1076.1 Language Reference Manual, IEEE Std 1076.1-1999.
11. R del Río, F. Medeiro, B. Pérez-Verdú and A Rodríguez-Vázquez ?Reliable Analysis of Settling Errors in SC Integrators: Application to Modulators,? IEE Electronics Letters, pp. 503-504, Vol. 36 Iss. 6, March 2000.