Breaking the simulation barrier: SRAM evaluation through norm minimization

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD

Volumn , Issue , 2008, Pages 322-329

  Dolecek, Lara ^a   Qazi, Masood ^a   Shah, Devavrat ^a   Chandrakasan, Anantha ^a  

^a USA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED DESIGN; DATA STORAGE EQUIPMENT; OPTIMIZATION; PAPER; PROBABILITY; RAILROAD PLANT AND STRUCTURES; RANDOM PROCESSES; SAMPLING; STATIC RANDOM ACCESS STORAGE;

32 NM TECHNOLOGIES; 6T-SRAM; CLASSICAL THEORIES; COMPUTATIONAL SAVINGS; DATA RETENTION VOLTAGES; DEEP SUBMICRON TECHNOLOGIES; FAILURE PROBABILITIES; FAILURE PROBABILITY ESTIMATIONS; ILLUSTRATIVE EXAMPLES; IMPORTANCE SAMPLINGS; MEMORY DESIGNS; MONTE CARLO APPROACHES; PROCESS VARIATIONS;

STATISTICAL METHODS;

EID: 57849149953     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCAD.2008.4681593     Document Type: Conference Paper

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