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Volumn , Issue , 2008, Pages 691-694
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Characterization of random decision errors in clocked comparators
a a a a |
Author keywords
[No Author keywords available]
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Indexed keywords
90NM CMOS;
A/D CONVERTERS;
DECISION ERROR PROBABILITIES;
DECISION ERRORS;
EXCESS NOISE FACTORS;
LABORATORY MEASUREMENTS;
LINE DETECTORS;
MEMORY BITS;
NOISE MODELS;
OUTPUT LEVELS;
PERIODIC NOISES;
PERIODICALLY TIME-VARYING;
RANDOM NOISES;
RF CIRCUITS;
SENSITIVE APPLICATIONS;
SHORT CHANNELS;
SIMULATION RESULTS;
SMALL SIGNALS;
WIDESPREAD USES;
CIRCUIT SIMULATION;
COMPARATORS (OPTICAL);
INTEGRATED CIRCUITS;
NETWORKS (CIRCUITS);
PROBABILITY;
RANDOM ERRORS;
RANDOM PROCESSES;
SIGNAL PROCESSING;
TIME VARYING NETWORKS;
TIME VARYING SYSTEMS;
ELECTRIC NETWORK ANALYSIS;
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EID: 57849092725
PISSN: 08865930
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1109/CICC.2008.4672180 Document Type: Conference Paper |
Times cited : (12)
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References (8)
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