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Volumn , Issue , 2008, Pages 457-464

Diastolic arrays: Throughput-driven reconfigurable computing

Author keywords

[No Author keywords available]

Indexed keywords

AVERAGE THROUGHPUTS; BUFFER SPACES; COMMUNICATING FINITE STATE MACHINES; EFFICIENT SYNTHESES; H.264 DECODING; HARDWARE SUPPORTS; PROCESSING ELEMENTS; RECONFIGURABLE COMPUTING;

EID: 57849086430     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCAD.2008.4681615     Document Type: Conference Paper
Times cited : (10)

References (19)
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    • E. A. Lee and D. G. Messerschmitt, "Static scheduling of synchronous data flow programs for digital signal processing," IEEE Trans. Computers, vol. 36, no. 1, pp. 24-35, 1987.
    • (1987) IEEE Trans. Computers , vol.36 , Issue.1 , pp. 24-35
    • Lee, E.A.1    Messerschmitt, D.G.2
  • 4
    • 84990479742 scopus 로고
    • An efficient heuristic procedure for partitioning graphs
    • February
    • B. W. Kernighan and S. Lin. "An efficient heuristic procedure for partitioning graphs." Bell System Technical Journal, vol. 49, pp. 291-307, February 1970.
    • (1970) Bell System Technical Journal , vol.49 , pp. 291-307
    • Kernighan, B.W.1    Lin, S.2
  • 9
  • 10
    • 0019923189 scopus 로고
    • Why Systolic Architectures?
    • January
    • H. T. Kung, "Why Systolic Architectures?" in Computer Magazine, January 1982.
    • (1982) Computer Magazine
    • Kung, H.T.1
  • 14
    • 36849030305 scopus 로고    scopus 로고
    • On-Chip Interconnection Architecture of the Tile Processor
    • Sept/Oct
    • David Wentzlaff et al, "On-Chip Interconnection Architecture of the Tile Processor," IEEE Micro, vol. 27, no. 5, pp. 15-31, Sept/Oct 2007.
    • (2007) IEEE Micro , vol.27 , Issue.5 , pp. 15-31
    • Wentzlaff, D.1
  • 16
    • 57849134396 scopus 로고    scopus 로고
    • High performance and energy efficient multi-core systems for DSP applications,
    • Ph.D. dissertation, U. C. Davis
    • Z. Yu, "High performance and energy efficient multi-core systems for DSP applications," Ph.D. dissertation, U. C. Davis, 2007.
    • (2007)
    • Yu, Z.1
  • 17
    • 36849038952 scopus 로고    scopus 로고
    • Synchronization through Communication in a Massively Parallel Processor Array
    • Sept/Oct
    • M. Butts, "Synchronization through Communication in a Massively Parallel Processor Array," IEEE Micro, vol. 27, no. 5, pp. 32-40, Sept/Oct 2007.
    • (2007) IEEE Micro , vol.27 , Issue.5 , pp. 32-40
    • Butts, M.1
  • 19
    • 34247220407 scopus 로고    scopus 로고
    • A Method for Routing Packets Across Multiple Paths in NoCs with In-Order Delivery and Fault-Tolerance Gaurantees
    • S. Murali, D. Atienz, L. Benini, and G. D. Micheli, "A Method for Routing Packets Across Multiple Paths in NoCs with In-Order Delivery and Fault-Tolerance Gaurantees," VLSI Design, vol. 2007, 2007.
    • (2007) VLSI Design , vol.2007
    • Murali, S.1    Atienz, D.2    Benini, L.3    Micheli, G.D.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.