Twin silicon nanowire FET (TSNWFET) on SOI with 8 nm silicon nanowires and 25 nm surrounding TiN gate

Proceedings - IEEE International SOI Conference

Volumn , Issue , 2008, Pages 117-118

  Kim, Dong Won ^a   Li, Ming ^a   Kyoung, Hwan Yeo ^a   Yun, Young Yeoh ^a   Sung, Dae Suk ^a   Keun, Hwi Cho ^a   Oh, Kyungseok ^a   Lee, Won Seong ^a  

^a SAMSUNG Electronics   (South Korea)

Author keywords

Reliability; Silicon nanowire; SOI; Surrounding gate

Indexed keywords

ELECTRIC WIRE; FIELD EFFECT TRANSISTORS; LEAKAGE CURRENTS; NANOWIRES; RELIABILITY; TIN; TITANIUM COMPOUNDS; TITANIUM NITRIDE;

AND GATES; DEVICE RELIABILITIES; MANUFACTURABILITY; OFF CURRENTS; SILICON NANOWIRE; SOI; SURROUNDING GATE; TIN GATES;

NONMETALS;

EID: 57749199091     PISSN: 1078621X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SOI.2008.4656322     Document Type: Conference Paper

References (4)

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4. Ming Li, et al., ICSICT, p78, 2006.