Sub-45nm Fully-Depleted SOI CMOS subthreshold logic for ultra-low-power applications

Proceedings - IEEE International SOI Conference

Volumn , Issue , 2008, Pages 57-58

  Bol, D ^a   Ambroise, R ^a   Flandre, D ^a   Legat, J D ^a  

^a UNIVERSITÉ CATHOLIQUE DE LOUVAIN   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 57749184780     PISSN: 1078621X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SOI.2008.4656292     Document Type: Conference Paper

References (7)

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7. J. Kwong et al., ACM/IEEE ISLPED, pp. 8-13, 2006.