Floating body cell (FBC) memory for 16-nm technology with low variation on thin silicon and 10-nm BOX

Proceedings - IEEE International SOI Conference

Volumn , Issue , 2008, Pages 29-30

  Avci, U E ^a   Ban, I ^a   Kencke, D L ^a   Chang, P L D ^a  

^a INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

WINDOWS;

6T-SRAM; FLOATING BODIES; LOSS MECHANISMS; MEASURED DATUMS; MEMORY CELL SIZES; METAL GATES; RETENTION TIMES; SCALED DEVICES; SENSING WINDOWS; TECHNOLOGY NODES;

NANOTECHNOLOGY;

EID: 57749174077     PISSN: 1078621X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SOI.2008.4656279     Document Type: Conference Paper

References (3)

1. T. Ban et al., VLST Conf., pp.92-93, 2008
2. T. Ban et al., TEDM, pp.21.3, 2006
3. W. Shockley et al., Phys. Rev. 87, pp.835-842, 1952