A probabilistic technique for full-chip leakage estimation

Proceedings of the International Symposium on Low Power Electronics and Design

Volumn , Issue , 2008, Pages 205-208

  Liu, Shaobo ^a   Qiu, Qinru ^a   Wu, Qing ^a  

^a State University of New York at Binghamton   (United States)

Author keywords

Leakage estimation; VLSI

Indexed keywords

DIES; ELECTRIC BATTERIES; ESTIMATION; LEAKAGE CURRENTS; LOW POWER ELECTRONICS; MONTE CARLO METHODS; POWER ELECTRONICS; RANDOM PROCESSES; TRELLIS CODES;

ESTIMATION ERRORS; GAUSSIAN RANDOM VARIABLES; LAYOUT INFORMATIONS; LEAKAGE ESTIMATION; MEAN VALUES; MODELING PROCESS; MONTE CARLO SIMULATIONS; PROBABILISTIC TECHNIQUES; PROCESS VARIATIONS; RANDOM VECTORS; STANDARD CELLS; VLSI;

RANDOM VARIABLES;

EID: 57649094597     PISSN: 15334678     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1393921.1393975     Document Type: Conference Paper

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