Accurate memory signatures and synthetic address traces for HPC applications

Proceedings of the International Conference on Supercomputing

Volumn , Issue , 2008, Pages 36-45

  Weinberg, Jonathan ^a   Snavely, Allan E ^b  

^a UNIVERSITY OF CALIFORNIA   (United States)

^b UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

Caches; HPC; Locality; Synthetic memory traces

Indexed keywords

CACHE HIT RATES; CACHES; GUIDE SYSTEMS; HIGH-PERFORMANCE COMPUTING; HPC; LOCALITY; MEMORY ADDRESSES; MEMORY HIERARCHIES; MEMORY REQUIREMENTS; PARALLEL APPLICATIONS; PERFORMANCE ANALYSES; REALISTIC WORKLOADS; SAMPLING TECHNIQUES; SOFTWARE SUITES; SPATIAL AND TEMPORAL LOCALITIES; SYNTHETIC MEMORY TRACES;

APPLICATIONS; COMPUTERS; INTELLIGENT CONTROL;

BENCHMARKING;

EID: 57349197051     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1375527.1375536     Document Type: Conference Paper

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