-
1
-
-
18844453678
-
On low-frequency electric power generation with PZT ceramics
-
' ', ()
-
Platt, S.R., Farritor, S., and Haider, H.: ' On low-frequency electric power generation with PZT ceramics ', IEEE/ASME Trans. Mechatron., 2005, 10, (2), p. 240-252
-
(2005)
IEEE/ASME Trans. Mechatron.
, vol.10
, Issue.2
, pp. 240-252
-
-
Platt, S.R.1
Farritor, S.2
Haider, H.3
-
2
-
-
57649205388
-
Low power IC design of the wireless monitoring system of the orthopedic implants
-
' ', Lyon, France, August
-
Chen, H., Liu, M., Jia, C., Zhang, C., and Wang, Z.: ' Low power IC design of the wireless monitoring system of the orthopedic implants ', Proc. 29th Annual Int. Conf. IEEE Engineering in Medicine and Biology Society 2007, Lyon, France, August, 2007, p. 5766-5769
-
(2007)
Proc. 29th Annual Int. Conf. IEEE Engineering in Medicine and Biology Society 2007
, pp. 5766-5769
-
-
Chen, H.1
Liu, M.2
Jia, C.3
Zhang, C.4
Wang, Z.5
-
3
-
-
85007041366
-
Parasitic power harvesting in shoes
-
' ', Los Alamitos, CA, August
-
Kymissis, J., Kendall, C., Paradiso, J.J., and Gershenfeld, N.: ' Parasitic power harvesting in shoes ', Proc. 2nd IEEE Int. Conf.Wearable Computing, Los Alamitos, CA, August, 1998, p. 132-139
-
(1998)
Proc. 2nd IEEE Int. Conf.Wearable Computing
, pp. 132-139
-
-
Kymissis, J.1
Kendall, C.2
Paradiso, J.J.3
Gershenfeld, N.4
-
4
-
-
0035330620
-
Energy scavenging with shoe-mounted piezoelectrics
-
' ', (), 0272-1732
-
Shenck, N.S., and Paradiso, J.A.: ' Energy scavenging with shoe-mounted piezoelectrics ', IEEE Micro., 2001, 21, (3), p. 30-42 0272-1732
-
(2001)
IEEE Micro.
, vol.21
, Issue.3
, pp. 30-42
-
-
Shenck, N.S.1
Paradiso, J.A.2
-
5
-
-
34548860702
-
Power harvesting with PZT ceramics
-
' ', New Orleans, LA, USA, May
-
Chen, H., Jia, C., Wang, Z., and Liu, C.: ' Power harvesting with PZT ceramics ', Proc. 2007 IEEE Int. Symp. Circuit and Systems (ISCAS2007), New Orleans, LA, USA, May, 2007, p. 557-560
-
(2007)
Proc. 2007 IEEE Int. Symp. Circuit and Systems (ISCAS2007)
, pp. 557-560
-
-
Chen, H.1
Jia, C.2
Wang, Z.3
Liu, C.4
-
6
-
-
40949098075
-
On power harvesting using pzt ceramics in orthopaedic implants and circuit design
-
' ', (), (Chinese version)
-
Chen, H., Jia, C., Liu, M., and Wang, Z.: ' On power harvesting using pzt ceramics in orthopaedic implants and circuit design ', J. Tsinghua University (Sci. and Technolo.), 2008, 48, (1), p. 128-131, (Chinese version)
-
(2008)
J. Tsinghua University (Sci. and Technolo.)
, vol.48
, Issue.1
, pp. 128-131
-
-
Chen, H.1
Jia, C.2
Liu, M.3
Wang, Z.4
-
7
-
-
33746626958
-
Piezoelectric micro-power generation interface circuits
-
' ', (), 0018-9200
-
Le, T.T., Han, J., von Jouanne, A., Mayaram, K., and Fiez, T.S.: ' Piezoelectric micro-power generation interface circuits ', IEEE J. Solid-State Circuits., 2006, 41, (6), p. 1411-1420 0018-9200
-
(2006)
IEEE J. Solid-State Circuits.
, vol.41
, Issue.6
, pp. 1411-1420
-
-
Le, T.T.1
Han, J.2
Von Jouanne, A.3
Mayaram, K.4
Fiez, T.S.5
-
8
-
-
8344259144
-
Fully integrated wideband high-current rectifiers for inductively powered devices
-
' ', (), 0018-9200
-
Ghovanloo, M., and Najafi, K.: ' Fully integrated wideband high-current rectifiers for inductively powered devices ', IEEE J. Solid-State Circuits, 2004, 39, (11), p. 1976-1984 0018-9200
-
(2004)
IEEE J. Solid-State Circuits
, vol.39
, Issue.11
, pp. 1976-1984
-
-
Ghovanloo, M.1
Najafi, K.2
-
9
-
-
17044379840
-
Design considerations of recent advanced low-voltage low-temperature- coefficient CMOS bandgap voltage reference
-
' ', Orlando, FL, USA, October
-
Mok, P.K.T., and Leung, K.N.: ' Design considerations of recent advanced low-voltage low-temperature-coefficient CMOS bandgap voltage reference ', CICC, Orlando, FL, USA, October, 2004, p. 635-642
-
(2004)
CICC
, pp. 635-642
-
-
Mok, P.K.T.1
Leung, K.N.2
-
10
-
-
0032675035
-
A CMOS bandgap reference circuit with sub-1-V operation
-
et al. ' ', (), 0018-9200
-
Banba, H., Shiga, H., and Umezawa, A.: et al. ' A CMOS bandgap reference circuit with sub-1-V operation ', IEEE J. Solid-State Circuits, 1999, 34, (5), p. 670-674 0018-9200
-
(1999)
IEEE J. Solid-State Circuits
, vol.34
, Issue.5
, pp. 670-674
-
-
Banba, H.1
Shiga, H.2
Umezawa, A.3
-
11
-
-
0031191440
-
Improved synthesis of gain-boosted regulated-cascode CMOS stages using symbolic analysis and gm/ID methodology
-
' ', ()
-
Flandre, D., Viviani, A., Eggermont, J-P., Gentinne, B., and Jespers, P.G.A.: ' Improved synthesis of gain-boosted regulated-cascode CMOS stages using symbolic analysis and gm/ID methodology ', J. Solid-State Circuits, 1997, 32, (7), p. 1006-1012
-
(1997)
J. Solid-State Circuits
, vol.32
, Issue.7
, pp. 1006-1012
-
-
Flandre, D.1
Viviani, A.2
Eggermont, J.-P.3
Gentinne, B.4
Jespers, P.G.A.5
-
12
-
-
0029711283
-
CMOS low-power analog circuit design
-
Cavin, R., Liu, W., (Institute of Electrical & Electronics Engineers)
-
Enz, C.C., and Vittoz, E.A.: ' CMOS low-power analog circuit design ', Cavin, R., Liu, W., Designing low power digital systems, Emerging Technologies, (Institute of Electrical & Electronics Engineers, 1996), p. 79-133
-
(1996)
Designing Low Power Digital Systems, Emerging Technologies
, pp. 79-133
-
-
Enz, C.C.1
Vittoz, E.A.2
-
13
-
-
0032188612
-
An MOS transistor model for analog circuit design
-
' ', (), 0018-9200
-
Cunha, A.I.A., Schneider, M.C., and Galup-Montoro, C.: ' An MOS transistor model for analog circuit design ', IEEE J. Solid-State Circuits, 1998, 33, (10), p. 1510-1519 0018-9200
-
(1998)
IEEE J. Solid-State Circuits
, vol.33
, Issue.10
, pp. 1510-1519
-
-
Cunha, A.I.A.1
Schneider, M.C.2
Galup-Montoro, C.3
-
14
-
-
0029181049
-
Performance limits of switched-capacitor DC-DC converters
-
' ', Atlanta, Georgia
-
Makowski, M.S., and Maksimovic, D.: ' Performance limits of switched-capacitor DC-DC converters ', PESC'95 Record, 26th Annual IEEE(2), Atlanta, Georgia, 1995, p. 1215-1221
-
(1995)
PESC'95 Record, 26th Annual IEEE(2)
, pp. 1215-1221
-
-
Makowski, M.S.1
Maksimovic, D.2
-
15
-
-
36349024797
-
A multi-stage interleaved synchronous buck converter with integrated output filter in a 0.18m SiGe process
-
' ', San Francisco, CA, USA
-
Abedinpour, S., Bakkaloglu, B., and Kiaei, S.: ' A multi-stage interleaved synchronous buck converter with integrated output filter in a 0.18m SiGe process ', ISSCC, San Francisco, CA, USA, 2006, p. 356-358
-
(2006)
ISSCC
, pp. 356-358
-
-
Abedinpour, S.1
Bakkaloglu, B.2
Kiaei, S.3
-
16
-
-
0032028335
-
A high-efficiency CMOS voltage doubler
-
' ', (), 0018-9200
-
Favrat, P., Deval, P., and Declercq, M.J.: ' A high-efficiency CMOS voltage doubler ', IEEE J. Solid-State Circuits, 1998, 33, (3), p. 410-416 0018-9200
-
(1998)
IEEE J. Solid-State Circuits
, vol.33
, Issue.3
, pp. 410-416
-
-
Favrat, P.1
Deval, P.2
Declercq, M.J.3
-
18
-
-
0020243830
-
A precision variable-supply CMOS comparator
-
0018-9200
-
Allstot, D.J.: ' A precision variable-supply CMOS comparator ', IEEE J. Solid-State Circuits, 1982, 17, (6), p. 1080-1087 0018-9200
-
(1982)
IEEE J. Solid-State Circuits
, vol.17
, Issue.6
, pp. 1080-1087
-
-
Allstot, D.J.1
-
19
-
-
34548853721
-
A 5mA 0.6m CMOS Miller-compensated LDO regulator with -27dB worst-case power-supply rejection using 60pF of on-chip capacitance
-
' ', San Francisco, CA, USA
-
Gupta, V., and Rincón-Mora, G.A.: ' A 5mA 0.6m CMOS Miller-compensated LDO regulator with -27dB worst-case power-supply rejection using 60pF of on-chip capacitance ', ISSCC, San Francisco, CA, USA, 2007, p. 520-521
-
(2007)
ISSCC
, pp. 520-521
-
-
Gupta, V.1
Rincón-Mora, G.A.2
|