-
1
-
-
0026267802
-
An effective on-chip preloading scheme to reduce data access penalty
-
J. Baer and T. Chen, An effective on-chip preloading scheme to reduce data access penalty. In Proc. of Supercomputing'91, 1991.
-
Proc. of Supercomputing'91, 1991
-
-
Baer, J.1
Chen, T.2
-
2
-
-
47349112480
-
Scavenger: A New Last Level Cache Architecture With Global Block Priority
-
A. Basu, N. Kirman, M. Kirman, M. Chaudhuri, J.F. Martinez, Scavenger: A New Last Level Cache Architecture With Global Block Priority, In Proc. of Int. Symp. on Microarchitecture, 2007,
-
(2007)
Proc. of Int. Symp. on Microarchitecture
-
-
Basu, A.1
Kirman, N.2
Kirman, M.3
Chaudhuri, M.4
Martinez, J.F.5
-
3
-
-
0034839033
-
Speculative Precomputation: Long-range Prefetching of Delinquent Loads
-
J.D. Collins, H. Wang, D.M. Tullsen, C. Hughes, Y-F. Lee, D. Lavery and J.P. Shen, Speculative Precomputation: Long-range Prefetching of Delinquent Loads. In Proc. of Int. Symp. Computer Architecture-28, 2001.
-
(2001)
Proc. of Int. Symp. Computer Architecture-28
-
-
Collins, J.D.1
Wang, H.2
Tullsen, D.M.3
Hughes, C.4
Lee, Y.-F.5
Lavery, D.6
Shen, J.P.7
-
5
-
-
0012612903
-
The University of Texas at Austin, Department of Computer Sciences. Technical Report TR-01-23, 2001
-
R. Desikan, D.C. Burger, S.W. Keckler and T. Austin, Sim-alpha: a Validated, Execution-Driven Alpha 21264 Simulator. The University of Texas at Austin, Department of Computer Sciences. Technical Report TR-01-23, 2001.
-
-
-
Desikan, R.1
Burger, D.C.2
Keckler, S.W.3
Austin, T.4
-
10
-
-
0025429331
-
Improving direct-mapped cache performance by the addition of a small fully-associative cache and prefetch buffers
-
N.P. Jouppi, Improving direct-mapped cache performance by the addition of a small fully-associative cache and prefetch buffers. In Proc. of Int. Symp. Computer Architecture, 1990.
-
(1990)
Proc. of Int. Symp. Computer Architecture
-
-
Jouppi, N.P.1
-
17
-
-
33845874613
-
-
M.K. Qureshi, D.N. Lynch, O. Mutlu, Y.N. Patt, A Case for MLP-Aware Cache Replacement. In Proc. of Int. Symp. Computer Architecture, 2006.
-
M.K. Qureshi, D.N. Lynch, O. Mutlu, Y.N. Patt, A Case for MLP-Aware Cache Replacement. In Proc. of Int. Symp. Computer Architecture, 2006.
-
-
-
-
21
-
-
0034844456
-
Locality vs. Criticality
-
Proc. of Int
-
S.T. Srinivasan, R.D-C. Ju, A.R. Lebeck, C.R. Wilkerson, Locality vs. Criticality. In In Proc. of Int. Symp. Computer Architecture, 2001,
-
(2001)
Symp. Computer Architecture
-
-
Srinivasan, S.T.1
Ju, R.D.-C.2
Lebeck, A.R.3
Wilkerson, C.R.4
-
22
-
-
16244410220
-
CSE-TR-400-99, University of Michigan Technical Report
-
V. Srinivasan, G.S. Tyson and E.S. Davidson. A static filter for reducing prefetch traffic. CSE-TR-400-99, University of Michigan Technical Report, 1999.
-
(1999)
-
-
Srinivasan, V.1
Tyson, G.S.2
Davidson, E.S.3
-
23
-
-
0038345683
-
Guided Region Prefetching: A Cooperative Hardware/Software Approach
-
Z. Wang, D. Burger, K. McKinley, S. Reinhardt and C. Weems, Guided Region Prefetching: A Cooperative Hardware/Software Approach. In Proc. of Int. Symp. Computer Architecture, 2003.
-
(2003)
Proc. of Int. Symp. Computer Architecture
-
-
Wang, Z.1
Burger, D.2
McKinley, K.3
Reinhardt, S.4
Weems, C.5
|