Understanding bvbug fix patterns in verilog

Proceedings - International Conference on Software Engineering

Volumn , Issue , 2008, Pages 39-42

  Sudhakrishnan, Sangeetha ^a   Madhavan, Janaki T ^a   James Whitehead Jr , E ^a   Renau, Jose ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

Bug; Fault; Fix; Patterns

Indexed keywords

BUG; BUG FIXES; ELECTRONIC SYSTEMS; FAULT; FIX; HARDWARE DESCRIPTION LANGUAGES; PATTERNS; PROGRAMMABLE LOGIC DEVICES; SOFTWARE CONFIGURATION MANAGEMENTS; TRADITIONAL SOFTWARES; VERILOG; ERROR CLASSIFICATION; PROGRAMMABLE LOGIC DEVICE; SOFTWARE CONFIGURATION MANAGEMENT; SOFTWARE PROJECT; VHDL;

HARDWARE; INTEGRATED CIRCUITS; LOGIC DEVICES; PROGRAM DEBUGGING; SOFTWARE ENGINEERING;

COMPUTER HARDWARE DESCRIPTION LANGUAGES;

EID: 57049144208     PISSN: 02705257     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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