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Volumn , Issue , 2005, Pages 6026-6029

Digital signal processing engine design for polar transmitter in wireless communication systems

Author keywords

[No Author keywords available]

Indexed keywords

CMOS PROCESS; CO-ORDINATE ROTATION DIGITAL COMPUTERS; DIGITAL PARTS; DIGITAL PHASE MODULATORS; DIRECT DIGITAL FREQUENCY SYNTHESIZER; HIGH EFFICIENCY POWER AMPLIFIERS; MULTIMODE; NEW DESIGN; POLAR MODULATION; POLAR TRANSMITTER; PROTOTYPE CHIP; WIRELESS COMMUNICATION SYSTEM; WIRELESS SYSTEMS;

EID: 56849112625     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2005.1466013     Document Type: Conference Paper
Times cited : (3)

References (10)
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  • 2
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    • Out-of-band emissions of digital transmissions using Kahn EER technique
    • Aug
    • Rudolph, D.; "Out-of-band emissions of digital transmissions using Kahn EER technique," IEEE Trans., Microwave Theory and Techniques, vol. 50, pp. 1979-1983. Aug. 2002.
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    • Rudolph, D.1
  • 3
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    • Digital frequency synthesizer/modulator for continuous-phase modulations with slow frequency hopping
    • Nov
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    • (1997) IEEE Trans., Vehicular Technology , vol.46 , pp. 933-940
    • Vankka, J.1
  • 4
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    • Nov
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  • 6
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    • A fast parallel multiplier-accumulator using the modified Booth algorithm
    • Sept
    • Elguibaly, F.; "A fast parallel multiplier-accumulator using the modified Booth algorithm," IEEE Trans., Circuits and Systems, vol. 47 , pp. 902-908 , Sept. 2000
    • (2000) IEEE Trans., Circuits and Systems , vol.47 , pp. 902-908
    • Elguibaly, F.1
  • 7
    • 17044401887 scopus 로고    scopus 로고
    • Low power direct digital frequency synthesizers in 0.18 /spl mu/m CMOS
    • Sept
    • Langlois, J.M.P.; Al-Khalili, D.; "Low power direct digital frequency synthesizers in 0.18 /spl mu/m CMOS," IEEE CICC Proceedings, pp. 21-24, Sept. 2003.
    • (2003) IEEE CICC Proceedings , pp. 21-24
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  • 8
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.