Using arithmetic coding for reduction of resulting simulation data size on massively parallel GPGPUs

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 5205 LNCS, Issue , 2008, Pages 295-302

  Balevic, Ana ^a   Rockstroh, Lars ^a   Wroblewski, Marek ^a   Simon, Sven ^a  

^a UNIVERSITY OF STUTTGART   (Germany)

Author keywords

Arithmetic coding; Data compression; GPGPU; HPC; I O bandwidth

Indexed keywords

BANDWIDTH COMPRESSION; DATA COMPRESSION; DATA PROCESSING; DATA STORAGE EQUIPMENT; DIGITAL ARITHMETIC; MESSAGE PASSING; PROGRAM PROCESSORS; PROGRAMMING THEORY; TELECOMMUNICATION SYSTEMS;

ARITHMETIC CODING; CURRENT PERFORMANCES; DATA SIZES; GPGPU; GRAPHICS PROCESSING UNITS; HPC; I/O BANDWIDTH; I/O BANDWIDTHS; PARALLEL PLATFORMS; POST-PROCESSING; SIMULATION DATUMS; SIMULATION PERFORMANCES; STORAGE CAPACITIES;

DATA REDUCTION;

EID: 56449129647     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/978-3-540-87475-1_40     Document Type: Conference Paper

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