Metal pitch effects in deep submicron IC design

Electronic Engineering (London)

Volumn 68, Issue 835, 1996, Pages 45-X

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EID: 5644245368     PISSN: 00134902     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

References (1)

1. 'Low-Voltage CMOS Device Scaling', Chenming Hu, University of California at Berkeley, Proc. ISSCC 1994