Interleaving quasi-sliding-mode control of parallel-connected buck-based inverters

IEEE Transactions on Industrial Electronics

Volumn 55, Issue 11, 2008, Pages 3865-3873

  Ramos, Rafael ^a   Biel, Domingo ^a   Fossas, Enric ^a   Guinjoan, Francisco ^a  

^a UNIVERSITAT POLITÈCNICA DE CATALUNYA   (Spain)

Author keywords

Field programmable gate array (FPGA); Interleaving operation; Modular inverter system; Zero average dynamics (ZAD) quasi sliding control algorithm

Indexed keywords

CONTROL THEORY; DYNAMICS; ENERGY MANAGEMENT; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); LOGIC GATES; PARALLEL ALGORITHMS; VOLTAGE REGULATORS;

CURRENT SHARING; DESIGN FEATURES; FIELD-PROGRAMMABLE GATE ARRAY (FPGA); FIELD-PROGRAMMABLE GATE ARRAYS; FREQUENCY OPERATIONS; INTERLEAVING OPERATION; LOAD VARIATIONS; MODULAR INVERTER SYSTEM; MODULAR SYSTEMS; OUTPUT VOLTAGE REGULATIONS; POWER MANAGEMENT STRATEGIES; SINGLE-PHASE INVERTERS; SLIDING CONTROLS; SLIDING-MODE CONTROLS; SYSTEM OPERATIONS; ZERO AVERAGE DYNAMICS (ZAD) QUASI-SLIDING CONTROL ALGORITHM;

CONCURRENCY CONTROL;

EID: 56349147519     PISSN: 02780046     EISSN: None     Source Type: Journal    
DOI: 10.1109/TIE.2008.2006016     Document Type: Article

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