Analog CMOS circuits implementing neural segmentation model based on symmetric STDP learning

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 4985 LNCS, Issue PART 2, 2008, Pages 117-126

  Tovar, Gessyca Maria ^a   Fukuda, Eric Shun ^b   Asai, Tetsuya ^a   Hirose, Tetsuya ^a   Amemiya, Yoshihito ^a  

^a HOKKAIDO UNIVERSITY   (Japan)

^b UNIVERSITY OF TOKYO   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ABS RESINS; ANALOG CIRCUITS; CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; INTEGRATED CIRCUITS; NETWORKS (CIRCUITS); TIME MEASUREMENT;

ANALOG CMOS CIRCUITS; BASIC OPERATIONS; CMOS TECHNOLOGIES; FUNDAMENTAL CIRCUITS; IMPLEMENTING; MODEL BASED; NEURAL OSCILLATORS; SIMULATION PROGRAMS; SPIKE TIMINGS; SYNAPTIC CONNECTIONS; TEMPORAL DOMAINS;

SPICE;

EID: 54049146999     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/978-3-540-69162-4_13     Document Type: Conference Paper

References (9)

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