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Volumn , Issue , 2008, Pages 11-21

Analysis and solutions to issue queue process variation

Author keywords

IPC; Issue queue; Microarchitecture; Pipeline; Process variation

Indexed keywords

IPC; ISSUE QUEUE; MICROARCHITECTURE; PIPELINE; PROCESS VARIATION;

EID: 53349100054     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DSN.2008.4630066     Document Type: Conference Paper
Times cited : (4)

References (32)
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    • A. Agarwal, B. C. Paul, S. Mukhopadhyay, and K. Roy. Process variation in embedded memories: failure analysis and variation aware architecture. Solid-State Circuits, IEEE Journal of, 40:1804-1814, 2005.
    • A. Agarwal, B. C. Paul, S. Mukhopadhyay, and K. Roy. Process variation in embedded memories: failure analysis and variation aware architecture. Solid-State Circuits, IEEE Journal of, 40:1804-1814, 2005.
  • 10
    • 0036474722 scopus 로고    scopus 로고
    • K. Bowman, S. Duvall, and J. Meindl. Impact of die-to-die and within-die parameter fluctuations on the maximum clock frequency distribution for gigascale integration. Solid-State Circuits, IEEE Journal of, 37(2): 183-190, February 2002.
    • K. Bowman, S. Duvall, and J. Meindl. Impact of die-to-die and within-die parameter fluctuations on the maximum clock frequency distribution for gigascale integration. Solid-State Circuits, IEEE Journal of, 37(2): 183-190, February 2002.
  • 12
    • 53349119977 scopus 로고    scopus 로고
    • D. Burger and T. Austin. The SimpleScalar Toolset, Version 3.0
    • D. Burger and T. Austin. The SimpleScalar Toolset, Version 3.0. http ://www. simplescalar.com.
  • 21
    • 0036005110 scopus 로고    scopus 로고
    • Optimal time borrowing analysis and timing budgeting optimization for latch-based designs
    • S.-Z. E. Lin, C. Changfan, Y.-C. Hsu, and F.-S. Tsai. Optimal time borrowing analysis and timing budgeting optimization for latch-based designs. ACM Trans. Des. Autom. Electron. Syst., 7(1):217-230, 2002.
    • (2002) ACM Trans. Des. Autom. Electron. Syst , vol.7 , Issue.1 , pp. 217-230
    • Lin, S.-Z.E.1    Changfan, C.2    Hsu, Y.-C.3    Tsai, F.-S.4
  • 24
    • 0030676681 scopus 로고    scopus 로고
    • Complexity-effective superscalar processors
    • ACM Press
    • S. Palacharla, N. P. Jouppi, and J. E. Smith. Complexity-effective superscalar processors. In SIGARCH Comput. Archit. News, volume 25, pages 206-218. ACM Press, 1997.
    • (1997) SIGARCH Comput. Archit. News , vol.25 , pp. 206-218
    • Palacharla, S.1    Jouppi, N.P.2    Smith, J.E.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.