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Volumn , Issue , 2008, Pages 139-150

Flexible decoupled transactional memory support

Author keywords

[No Author keywords available]

Indexed keywords

CONFLICT MANAGEMENT; HIGH-QUALITY SOFTWARE; INTERNATIONAL SYMPOSIUM; LOCAL CACHES; RARE EVENTS; SUMMARY TABLES; TRANSACTIONAL MEMORIES; TRANSACTIONAL MEMORY; VIRTUAL MEMORY; VIRTUALIZATION;

EID: 52649096071     PISSN: 10636897     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCA.2008.17     Document Type: Conference Paper
Times cited : (105)

References (37)
  • 2
    • 0014814325 scopus 로고
    • Space/Time Trade-Off in Hash Coding with Allowable Errors
    • July
    • B. H. Bloom. Space/Time Trade-Off in Hash Coding with Allowable Errors. Comm. of the ACM, 13(7), July 1970.
    • (1970) Comm. of the ACM , vol.13 , Issue.7
    • Bloom, B.H.1
  • 14
    • 0027262011 scopus 로고
    • Transactional Memory: Architectural Support for Lock-Free Data Structures
    • San Diego, CA, May
    • M. Herlihy and J. E. Moss. Transactional Memory: Architectural Support for Lock-Free Data Structures. 20th Intl. Symp. on Computer Architecture, San Diego, CA, May 1993.
    • (1993) 20th Intl. Symp. on Computer Architecture
    • Herlihy, M.1    Moss, J.E.2
  • 15
    • 52649175697 scopus 로고    scopus 로고
    • M. D. Hill, D. Hower, K. E. Moore, M. M. Swift, H. Volos, and D. A. Wood. A Case for Deconstructing Hardware Transactional Memory Systems. TR 1594, Dept. of Computer Sciences, Univ. of Wisconsin-Madison, June 2007.
    • M. D. Hill, D. Hower, K. E. Moore, M. M. Swift, H. Volos, and D. A. Wood. A Case for Deconstructing Hardware Transactional Memory Systems. TR 1594, Dept. of Computer Sciences, Univ. of Wisconsin-Madison, June 2007.
  • 17
    • 35348835853 scopus 로고    scopus 로고
    • Transactional Memory, Synthesis Lectures on Computer Architecture
    • J. R. Larus and R. Rajwar. Transactional Memory, Synthesis Lectures on Computer Architecture. Morgan & Claypool, 2007.
    • (2007) Morgan & Claypool
    • Larus, J.R.1    Rajwar, R.2
  • 26
    • 34548817260 scopus 로고    scopus 로고
    • N. Sakran, M. Yuffe, M. Mehalel, J. Doweck, E. Knoll, and A. Kovacs. The Implementation of the 65nm Dual-Core 64b Merom Processor. Intl. Solid State Circuits Conf., Feb. 2007.
    • N. Sakran, M. Yuffe, M. Mehalel, J. Doweck, E. Knoll, and A. Kovacs. The Implementation of the 65nm Dual-Core 64b Merom Processor. Intl. Solid State Circuits Conf., Feb. 2007.
  • 30
    • 35348907278 scopus 로고    scopus 로고
    • An Integrated Hardware-Software Approach to Flexible Transactional Memory
    • June, TR 910, Dept. of Computer Science, Univ. of Rochester, Dec
    • A. Shriraman, M. F. Spear, H. Hossain, S. Dwarkadas, and M. L. Scott. An Integrated Hardware-Software Approach to Flexible Transactional Memory. 34th Intl. Symp. on Computer Architecture, June 2007. TR 910, Dept. of Computer Science, Univ. of Rochester, Dec. 2006.
    • (2006) 34th Intl. Symp. on Computer Architecture
    • Shriraman, A.1    Spear, M.F.2    Hossain, H.3    Dwarkadas, S.4    Scott, M.L.5
  • 31
    • 52649162694 scopus 로고    scopus 로고
    • A. Shriraman, S. Dwarkadas, and M. L. Scott. Flexible Decoupled Transactional Memory Support. TR 925, Dept. of Computer Science, Univ. of Rochester, Nov. 2007.
    • A. Shriraman, S. Dwarkadas, and M. L. Scott. Flexible Decoupled Transactional Memory Support. TR 925, Dept. of Computer Science, Univ. of Rochester, Nov. 2007.
  • 34
    • 52649116344 scopus 로고    scopus 로고
    • M. F. Spear, V. J. Marathe, L. Dalessandro, and M. L. Scott. Privatization Techniques for Software Transactional Memory. TR 915, Dept. of Computer Science, Univ. of Rochester, Feb. 2007.
    • M. F. Spear, V. J. Marathe, L. Dalessandro, and M. L. Scott. Privatization Techniques for Software Transactional Memory. TR 915, Dept. of Computer Science, Univ. of Rochester, Feb. 2007.
  • 35
    • 52649178613 scopus 로고    scopus 로고
    • Sun Microsystems Inc. OpenSPARC T2 Core Microarchitecture Specification. July
    • Sun Microsystems Inc. OpenSPARC T2 Core Microarchitecture Specification. July 2005.
    • (2005)
  • 37
    • 57349104427 scopus 로고    scopus 로고
    • Extending Hardware Transactional Memory to Support Non-Busy Waiting and Non-Transactional Actions
    • June
    • C. Zilles and L. Baugh. Extending Hardware Transactional Memory to Support Non-Busy Waiting and Non-Transactional Actions. 1st ACM SIGPLAN Workshop on Transactional Computing, June 2006.
    • (2006) 1st ACM SIGPLAN Workshop on Transactional Computing
    • Zilles, C.1    Baugh, L.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.