Wafer level LED packaging with integrated DRIE trenches for encapsulation

Proceedings, 2008 International Conference on Electronic Packaging Technology and High Density Packaging, ICEPT-HDP 2008

Volumn , Issue , 2008, Pages

  Zhang, Rong ^a   Lee, S W Ricky ^a  

^a HONG KONG UNIVERSITY OF SCIENCE AND TECHNOLOGY   (Hong Kong)

Author keywords

[No Author keywords available]

Indexed keywords

CHIP SCALE PACKAGES; ELECTRONIC EQUIPMENT MANUFACTURE; ENCAPSULATION; LITHOGRAPHY; NONMETALS; OPTICAL DESIGN; PAINTING; SILICON; SILICON WAFERS; SINGLE CRYSTALS; TECHNOLOGY;

DEEP REACTION ION ETCHING; ELECTRONIC PACKAGING; ENCAPSULANT; FLIP CHIPPING; HIGH-DENSITY PACKAGING; INTERNATIONAL CONFERENCES; LED ARRAYS; LED CHIPS; LED PACKAGING; ON-WAFER; PLATING PROCESSES; SINGLE-CRYSTAL SILICON WAFERS; UV-CURABLE; WAFER DICING; WAFER LEVELS; WAFER SUBSTRATES;

ELECTRONICS PACKAGING;

EID: 52449110738     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICEPT.2008.4607038     Document Type: Conference Paper

References (11)

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