DPWM based on FPGA clock phase shifting with time resolution under 100 ps

PESC Record - IEEE Annual Power Electronics Specialists Conference

Volumn , Issue , 2008, Pages 3054-3059

  De Castro, A ^a   Todorovich, E ^a  

^a UNIVERSIDAD AUTÓNOMA DE MADRID   (Spain)

Author keywords

[No Author keywords available]

Indexed keywords

CLOCKS; LAWS AND LEGISLATION; PHASE SHIFT; POWER ELECTRONICS;

CLOCK MANAGEMENT; CLOCK PHASE; HIGH LINEARITY; LOW COSTS; MONOTONIC BEHAVIOR; PHASE SHIFTING; TIME RESOLUTIONS; XILINX SPARTAN-3;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 52349094650     PISSN: 02759306     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/PESC.2008.4592418     Document Type: Conference Paper

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