A 48-860 MHz CMOS low-IF direct-conversion DTV tuner

IEEE Journal of Solid-State Circuits

Volumn 43, Issue 9, 2008, Pages 2013-2024

  Lerstaveesin, Supisa ^a,b,c   Gupta, Manoj ^b   Kang, David ^a,b,d   Song, Bang Sup ^a,e  

^a IEEE

^b Chrontel Inc   (United States)

^c QUALCOMM INC   (United States)

^d Axiom Microdevices Inc   (United States)

^e UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

Direct conversion receivers; Distortion; Harmonic rejection; Image rejection; Intermodulation; Poly phase mixer; TV tuner

Indexed keywords

ALIASING; CABLE TV; DIGITAL CHANNELS; DIGITAL TV; DIRECT CONVERSION RECEIVERS; DIRECT CONVERSIONS; DISTORTION; FREQUENCY RANGING; HARMONIC MIXING; HARMONIC REJECTION; IMAGE CORRELATION; IMAGE FILTERING; IMAGE REJECTION; IN-PHASE; INTERMODULATION; MEASURED SYSTEM; OFF-CHIP; PHASE MIXING; POLY-PHASE MIXER; RF FILTERING; RF FRONT ENDS; SIGNAL LEVELS; TV BAND; TV TUNER;

CHLORINE COMPOUNDS; COMMUNICATION CHANNELS (INFORMATION THEORY); DIGITAL ARITHMETIC; DIGITAL FILTERS; MIXING; STANDARDS; TELEVISION BROADCASTING; TUNERS; WAVE FILTERS;

DIGITAL TELEVISION;

EID: 52249110023     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2008.2001900     Document Type: Article

References (19)

1. L. Connell et al., "A CMOS broadband tuner IC," in IEEEISSCCDig. Tech. Papers, 2002, pp. 400-401.
2. M. Dawkins, A. Burdett, and N. Cowley, "A single-chip tuner for DVB-T," IEEE J. Solid-State Circuits, vol. 38, no. 8, pp. 1307-1317, Aug. 2003.
3. R. Montemayor, "A 410-mW 1.22-GHz downconverter in a dual-conversion tuner IC for OpenCable applications," IEEE J. Solid-State Circuits, vol. 39, no. 4, pp. 714-718, Apr. 2004.
4. J. Stevenson et al., "A multi-standard analog and digital TV tuner for cable and terrestrial applications," in IEEE ISSCC Dig. Tech. Papers, 2007, pp. 210-211.
5. C. Heng, M. Gupta, S. Lee, D. Kang, and B. Song, "A CMOS TV tuner/demodulator IC with digital image rejection," IEEE J. Solid-State Circuits, vol. 40, no. 12, pp. 2525-2535, Dec. 2005.
6. V. Fillatre et al., "A Sip tuner with integrated LC tracking filter for both cable and terrestrial reception," in IEEE ISSCC Dig. Tech. Papers, 2007, pp. 208-209.
7. J. van Sinderen et al., "A 48-860 MHz digital cable tuner IC with integrated RF and IF selectivity," in IEEE ISSCC Dig. Tech. Papers, 2003, pp. 444-445.
8. M. Gupta, S. Lerstaveesin, D. Kang, and B. Song, "A 48-to-860 MHz CMOS direct conversion TV tuner," in IEEE ISSCC Dig. Tech. Papers, 2007, pp. 206-207.
9. J. Weldon et al., "A 1.75-GHz highly integrated narrowband CMOS transmitter with harmonic-rejection mixers," IEEE J. Solid-State Circuits, vol. 36, no. 12, pp. 2003-2015, Dec. 2001.
10. K. Lee et al, "A single-chip 2.4 GHz direct conversion CMOS receiver for wireless local loop using multiphase reduced frequency conversion technique," IEEE J. Solid-State Circuits, vol. 36, no. 5, pp. 800-808, May 2001.
11. E. Mensink, E. Klumperink, and B. Nauta, "Distortion cancellation by polyphase multipath circuits," IEEE Trans. Circuits Syst. I, vol. 52, no. 9, pp. 1785-1794, Sep. 2005.
12. F. Bruccoleri, E. Klumperink, and B. Nauta, "Noise canceling in wideband CMOS LNAs," in IEEE ISSCC Dig. Tech. Papers, 2002, pp. 406-407.
13. T. Choi et al., "High-frequency CMOS switched-capacitor filters for communications application," IEEE J. Solid-State Circuits, vol. SC-18, pp. 652-664, Dec. 1983.
14. F. Krummenacher and N. Joehl, "A 4-MHz CMOS continuous-time filter with on-chip automatic tuning," IEEE J. Solid-State Circuits, vol. 23, no. 6, pp. 750-758, Jun. 1998.
15. F. Behbahani, W. Tan, A. Karimi-Sanjaani, and A. Abidi, "A broadband tunable CMOS channel-select filter for a low-IF wireless receiver," IEEE J. Solid-State Circuits, vol. 35, no. 4, pp. 476-489, Apr. 2004.
16. H. Khorramabadi and P. Gray, "High-frequency CMOS continuous-time filters," IEEE J. Solid-State Circuits, vol. SC-19, pp. 939-948, Dec. 1984.
17. S. Lindfors, J. Jussila, K. Halonen, and L. Siren, "A 3-V continuous-time filter with on-chip tuning for IS-95," IEEE J. Solid-State Circuits, vol. 34, no. 8, pp. 1150-1154, Aug. 1999.
18. A. Durham, J. Hughes, and W. Redman-White, "Circuit architectures for high linearity monolithic continuous-time filtering," IEEE Trans. Circuits Syst. II, vol. 39, pp. 651-657, Sep. 1992.
19. ATSC Recommended Practice: Receiver Performance Guidelines. Advanced Television Systems Committee, ATSC A/74, Jun. 2004.