Transforming distributed acyclic systems into equivalent uniprocessors under preemptive and non-preemptive scheduling

Proceedings - Euromicro Conference on Real-Time Systems

Volumn , Issue , 2008, Pages 233-242

  Jayachandran, Praveen ^a   Abdelzaher, Tarek ^a  

^a University of Illinois at Urbana Champaign   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ACYCLIC SYSTEMS; ANALYSIS TECHNIQUES; BLOCK DIAGRAMS; CIRCUIT IMPEDANCE; DIRECTED ACYCLIC GRAPH; DISTRIBUTED SYSTEMS; END-TO-END DELAY; EXTENDED ANALYSIS; IN-CONTROL; NON-PREEMPTIVE SCHEDULING; OVERALL PROPERTIES; PIPELINE DELAY; SCHEDULABILITY ANALYSIS; SCIENTIFIC DISCIPLINES; SINGLE-STAGE; TASK FLOWS; UNIPROCESSOR; UNIPROCESSORS;

AUTOMATION; CIRCUIT THEORY; COMPUTATION THEORY; CONTROL THEORY; LAWS AND LEGISLATION; NETWORKS (CIRCUITS); PIPELINES; SCHEDULING; SULFUR COMPOUNDS;

REAL TIME SYSTEMS;

EID: 52049109824     PISSN: 10683070     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ECRTS.2008.31     Document Type: Conference Paper

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